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1. 发明授权

US07242592B2 Printed circuit board for high speed, high density electrical connector with improved cross-talk minimization, attenuation and impedance mismatch characteristics 有权
标题翻译：印刷电路板用于高速，高密度电连接器，具有改进的串扰最小化，衰减和阻抗失配特性
公开(公告)号：US07242592B2
公开(公告)日：2007-07-10
申请号：US10603048
申请日：2003-06-24
申请人： Jason J. Payne , Mark W. Gailus , Leon M. Khilchenko , Huilin Ren
发明人： Jason J. Payne , Mark W. Gailus , Leon M. Khilchenko , Huilin Ren
IPC分类号： H05K1/11
CPC分类号： H01R13/6477 , H01R12/714 , H01R13/514 , H01R13/6471 , H01R13/6587 , H05K1/0219 , H05K1/112 , H05K3/429 , H05K2201/09381 , H05K2201/09627 , H05K2201/09709 , H05K2201/10189
摘要： In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias. For each of the plurality of rows of the conductive vias, there are at least twice as many ground conductor connecting conductive vias as signal conductor connecting conductive vias and the conductive vias are positioned relative to one another so that for each signal conductor connecting conductive via, there are ground conductor connecting conductive vias adjacent either side of the signal conductor connecting conductive via.
摘要翻译：在优选实施例中，公开了一种印刷电路板，其具有提供配合接口的表面，电连接器具有信号导体和接地导体。印刷电路板包括多个堆叠的电介质层，其中导体设置在多个电介质层中的至少一个上。配合接口包括以多行排列的多个导电通孔，多个导电通孔延伸穿过多个电介质层的至少一部分，多个导电通孔中的至少一个与导体相交。多个导电通孔包括连接导电通孔的信号导体和连接导电通孔的接地导体。对于导电通孔的多行中的每一行，存在至少两倍的接地导体，其连接导电通孔，作为连接导电通孔的信号导体，并且导电通孔相对于彼此定位，使得对于连接导电通孔的每个信号导体，有接地导体连接导电通孔，邻近信号导体的任一侧连接导电通孔。

2. 发明授权

US07484971B2 Electronic component with high density, low cost attachment 有权
标题翻译：电子元件密度高，附件成本低
公开(公告)号：US07484971B2
公开(公告)日：2009-02-03
申请号：US11604289
申请日：2006-11-27
申请人： Mark W. Gailus , Leon M. Khilchenko
发明人： Mark W. Gailus , Leon M. Khilchenko
IPC分类号： H01R9/09
CPC分类号： H05K3/3426 , H01L23/49811 , H01L24/80 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/351 , H05K2201/10704 , H05K2201/10795 , H05K2201/10803 , H05K2201/10924 , H05K2203/048 , Y02P70/613 , H01L2924/00
摘要： A contact tail for an electronic component compatible with surface mount manufacturing techniques. The contact tail is stamped, providing a relatively low manufacturing cost and high precision. High precision in the contact tails in turn provides more reliable solder joints across an array of contact tails in an electronic component. Further, the contact tail may be shaped to reduce the propensity for solder to wick from the attachment area during a reflow operation. Reducing the propensity of solder to wick reduces the chance that solder will interfere with the operation of the electronic component. Additionally, reducing the propensity for solder to wick allows pads to which the contact tail is attached to be positioned over vias, thereby increasing the density with which contacts may be attached to a substrate. The reliability with which electronic assemblies incorporating components using the contact tail is also increased when the contact tail is used in self-centering arrays.
摘要翻译：与表面贴装制造技术兼容的电子元件的接触尾部。接触尾部被冲压，提供相对低的制造成本和高精度。接触尾部的高精度依次在电子部件中的接触尾部阵列上提供更可靠的焊点。此外，接触尾部可以被成形为在回流操作期间降低焊料从连接区域芯吸的倾向。降低焊料对芯的倾向降低了焊料会干扰电子部件的操作的可能性。此外，降低焊料对芯的倾向允许接触尾部附着的焊盘定位在通孔上方，从而增加接触可附着于基底的密度。当接触尾部用于自定心阵列时，使用接触尾部组装部件的电子组件的可靠性也增加。

3. 发明授权

US07240425B2 Method of making an electrical connection to a conductor on an inner layer of a multi-layer printed circuit board 有权
标题翻译：与多层印刷电路板的内层上的导体电连接的方法
公开(公告)号：US07240425B2
公开(公告)日：2007-07-10
申请号：US10422515
申请日：2003-04-24
申请人： Leon M. Khilchenko , Mark W. Gailus
发明人： Leon M. Khilchenko , Mark W. Gailus
IPC分类号： H05K3/30
CPC分类号： H05K3/4038 , H05K1/0298 , H05K3/321 , H05K3/3447 , H05K3/4046 , H05K3/4069 , H05K2201/0305 , H05K2201/0919 , H05K2201/10234 , H05K2201/1059 , H05K2201/10992 , H05K2203/041 , H05K2203/1446 , Y10T29/4913 , Y10T29/49139 , Y10T29/49147 , Y10T29/49165
摘要： What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
摘要翻译：提供的是具有多个堆叠的电介质层的多层PCB，设置在多个电介质层中的至少一个介质层上的导体，以及延伸穿过多个电介质层的至少一部分的非导电通孔，与导体相交。处于激活状态的导电体被引入到非导电通孔中，并且在与导体接触时，活化状态导电体粘附到导体。然后使激活状态的导电体进入去激活状态，其中导电体固定到导体以提供与其的电连接。

4. 发明授权

US08115110B2 Printed circuit board minimizing undesirable signal reflections in a via and methods therefor 有权
标题翻译：印刷电路板最小化通孔中的不期望的信号反射及其方法
公开(公告)号：US08115110B2
公开(公告)日：2012-02-14
申请号：US11822137
申请日：2007-07-02
申请人： Leon M. Khilchenko , Mark W. Gailus
发明人： Leon M. Khilchenko , Mark W. Gailus
IPC分类号： H05K1/11
CPC分类号： H05K3/4038 , H05K1/0298 , H05K3/321 , H05K3/3447 , H05K3/4046 , H05K3/4069 , H05K2201/0305 , H05K2201/0919 , H05K2201/10234 , H05K2201/1059 , H05K2201/10992 , H05K2203/041 , H05K2203/1446 , Y10T29/4913 , Y10T29/49139 , Y10T29/49147 , Y10T29/49165
摘要： What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
摘要翻译：提供的是具有多个堆叠的电介质层的多层PCB，设置在多个电介质层中的至少一个介质层上的导体，以及延伸穿过多个电介质层的至少一部分的非导电通孔，与导体相交。处于激活状态的导电体被引入到非导电通孔中，并且在与导体接触时，活化状态导电体粘附到导体。然后使激活状态的导电体进入去激活状态，其中导电体固定到导体以提供与其的电连接。

5. 发明授权

US07630210B2 Lead(Pb)-free electronic component attachment 有权
标题翻译：无铅（Pb）电子元件附件
公开(公告)号：US07630210B2
公开(公告)日：2009-12-08
申请号：US11604710
申请日：2006-11-28
申请人： Mark W. Gailus , Leon M. Khilchenko
发明人： Mark W. Gailus , Leon M. Khilchenko
IPC分类号： H05K7/00
CPC分类号： H05K3/321 , H01L2924/0002 , H05K2201/10628 , H05K2201/10795 , H05K2201/10984 , H01L2924/00
摘要： A contact tail for an electronic component useful for attachment of components using conductive adhesive, which may be lead (Pb)-free. The contact tail is stamped, providing a relatively low manufacturing cost and high precision. The contact tail has a distal portion with a large surface area per unit length. The distal portion shapes conductive adhesive into a joint, holding the adhesive adjacent the lead for a more secure joint. Additionally, the distal portion holds adhesive to the contact tail before a joint is formed, facilitating the use of an adhesive transfer process to dispense adhesive. To further aid in the transfer of adhesive, the contact tail may be formed with concave portions, which increase the volume of adhesive adhering to the contact tail. By adhering an increased but controlled amount of adhesive to the contact tail, arrays of contact tails may be simply and reliably attached to printed circuit boards and other substrates.
摘要翻译：用于电子部件的接触尾部，其可用于使用导电粘合剂附接部件，其可以是无铅（Pb）。接触尾部被冲压，提供相对低的制造成本和高精度。接触尾部具有每单位长度具有大的表面积的远端部分。远端部分将导电粘合剂形成接头，将粘合剂保持在邻近引线的位置，用于更牢固的接头。此外，远端部分在形成接头之前将粘合剂保持在接触尾部，便于使用粘合剂转移过程来分配粘合剂。为了进一步有助于粘合剂的转移，接触尾部可以形成有凹部，其增加粘附到接触尾部的粘合剂的体积。通过将增加但可控制的粘合剂量粘附到接触尾部，接触尾部的阵列可以简单且可靠地附接到印刷电路板和其它基底。

6. 发明授权

US07508681B2 Printed circuit board for high speed, high density electrical connector with improved cross-talk minimization attenuation and impedance mismatch characteristics 失效
标题翻译：用于高速，高密度电连接器的印刷电路板，具有改进的串扰最小化衰减和阻抗失配特性
公开(公告)号：US07508681B2
公开(公告)日：2009-03-24
申请号：US11808642
申请日：2007-06-12
申请人： Jason J. Payne , Mark W. Gailus , Leon M. Khilchenko , Huilin Ren
发明人： Jason J. Payne , Mark W. Gailus , Leon M. Khilchenko , Huilin Ren
IPC分类号： H05K1/11
CPC分类号： H01R13/6477 , H01R12/714 , H01R13/514 , H01R13/6471 , H01R13/6587 , H05K1/0219 , H05K1/112 , H05K3/429 , H05K2201/09381 , H05K2201/09627 , H05K2201/09709 , H05K2201/10189
摘要： In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias. For each of the plurality of rows of the conductive vias, there are at least twice as many ground conductor connecting conductive vias as signal conductor connecting conductive vias and the conductive vias are positioned relative to one another so that for each signal conductor connecting conductive via, there are ground conductor connecting conductive vias adjacent either side of the signal conductor connecting conductive via.
摘要翻译：在优选实施例中，公开了一种印刷电路板，其具有提供配合接口的表面，电连接器具有信号导体和接地导体。印刷电路板包括多个堆叠的电介质层，其中导体设置在多个电介质层中的至少一个上。配合接口包括以多行排列的多个导电通孔，多个导电通孔延伸穿过多个电介质层的至少一部分，多个导电通孔中的至少一个与导体相交。多个导电通孔包括连接导电通孔的信号导体和连接导电通孔的接地导体。对于导电通孔的多行中的每一行，存在至少两倍的接地导体，其连接导电通孔，作为连接导电通孔的信号导体，并且导电通孔相对于彼此定位，使得对于连接导电通孔的每个信号导体，有接地导体连接导电通孔，邻近信号导体的任一侧连接导电通孔。

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