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    • 5. 发明申请
    • WAGERING GAME HAVING WIN STREAK AWARD FEATURE
    • 具有打赢特色的游戏
    • US20140087829A1
    • 2014-03-27
    • US13629253
    • 2012-09-27
    • Brian WatkinsMichael Casey
    • Brian WatkinsMichael Casey
    • A63F13/12A63F13/00
    • G07F17/32G07F17/3267
    • A gaming system, apparatus, and method are disclosed providing a free-spin bonus game, wherein the player's streaks of consecutive winning free spins are tracked throughout the bonus, with bonus enhancements or awards for achieving streaks of specified lengths. Some embodiments award additional free spins for win streaks. Other versions provide different numbers of additional spins awarded for each number of consecutive winning spins. Other embodiments provide different bonus features as an award for winning streaks, including credit prizes which may be fixed or variable, triggering a secondary bonus (such as a wheel spin or a pick bonus), or applying multiplier values to the reel-spin wins in the streak.
    • 公开了一种提供免费旋转奖励游戏的游戏系统,装置和方法,其中,连续获胜的自由旋转的条纹在整个奖金中被跟踪,具有用于实现指定长度的条纹的奖励增强或奖励。 一些实施例为获胜条件授予额外的自由旋转。 其他版本提供不同数量的额外旋转,为每个连续获胜旋转数量。 其他实施例提供不同的奖励特征,作为获胜条件的奖励,包括可以是固定的或可变的信用奖励,触发辅助奖励(例如轮子旋转或拾取奖励),或者将乘数值应用于卷轴旋转胜利 连胜。
    • 8. 发明授权
    • Accelerating PCB development and debug in advance of platform ASIC prototype samples
    • 在平台ASIC原型样品之前加快PCB开发和调试
    • US07363608B2
    • 2008-04-22
    • US11008854
    • 2004-12-09
    • Michael Casey
    • Michael Casey
    • G06F17/50
    • G01R31/2818H05K1/141H05K3/00H05K3/0005H05K2201/10212H05K2201/10325H05K2201/10689H05K2203/162
    • A system and method are provided for accelerating development and debug of a printed circuit board (PCB) designed for use with a platform ASIC in advance of availability of a prototype sample of the platform ASIC. Aspects of the invention include a pin-out adapter card that implements a predefined pin-out of the ASIC and that hosts FPGA logic resources for emulating I/O functionality and some (or all) of the ASIC core logic; a PCB designed for use with the platform ASIC, wherein the PCB includes the predefined ASIC pin-out for eventually mating with the ASIC; and a socket having mating connectors on both sides for mating with the ASIC pin-out on the PCB and to the ASIC pin-out on the adapter card, respectively, for coupling the adapter card to the PCB, thereby enabling development and debug of the PCB prior to availability of ASIC samples.
    • 提供了一种系统和方法,用于在平台ASIC的原型样本的可用性之前加速设计用于平台ASIC的印刷电路板(PCB)的开发和调试。 本发明的方面包括一个pin-out适配器卡,其实现ASIC的预定义引脚,并且承载用于仿真I / O功能的FPGA逻辑资源和一些(或全部)ASIC核心逻辑; 设计用于平台ASIC的PCB,其中PCB包括用于最终与ASIC交配的预定义的ASIC引脚输出; 以及一个插座,其两侧具有匹配的连接器,用于与PCB上的ASIC引脚分配和适配卡上的ASIC引脚分别相配合,以将适配器卡耦合到PCB,从而可以开发和调试 PCB在ASIC样品可用之前。