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    • 1. 发明授权
    • Display device having gate driver
    • US11322068B2
    • 2022-05-03
    • US17465723
    • 2021-09-02
    • LG Display Co., Ltd.
    • Yewon HongTaeWoong MoonJunHyeon BaeYeonkyung KimYeonwoo Shin
    • G09G3/20
    • A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a back gate bias voltage to apply the back gate bias voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.
    • 2. 发明授权
    • Display device capable of data output based on demultiplexing
    • US11151920B2
    • 2021-10-19
    • US16504029
    • 2019-07-05
    • LG DISPLAY CO., LTD.
    • Yewon HongJungHyun LeeTaeWoong Moon
    • G09G3/20G09G3/3275G09G3/36
    • A demultiplexer for sequentially outputting a data signal to a plurality of data lines disposed in a display panel can include a first switch connected to a first control node, the first switch being configured to electrically connect a first channel with a first data line among the plurality of data lines; a second switch connected to a second control node, the first switch being configured to electrically connect the first channel with a second data line among the plurality of data lines; a third switch connected to a third control node, the third switch being configured to electrically connect a second channel with a third data line among the plurality of data lines; and a fourth switch connected to a fourth control node, the fourth switch being configured to electrically connect the second channel with a fourth data line among the plurality of data lines, in which the first control node and the third control node are configured to receive a single first control signal, and be electrically disconnected from each other at a point in time, the second control node and the fourth control node are configured to receive a single second control signal, and be electrically disconnected from each other at a point in time, and the first control node and the third control node have different voltage conditions than the second control node and the fourth control node.
    • 9. 发明授权
    • Display device having gate driver
    • US11443674B2
    • 2022-09-13
    • US17465731
    • 2021-09-02
    • LG Display Co., Ltd.
    • Yewon HongTaeWoong MoonJunHyeon BaeYeonkyung KimYeonwoo Shin
    • G09G3/20
    • A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a first gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a second gate-off voltage lower than the first gate-off voltage to apply the second gate-off voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.