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    • 4. 发明授权
      US09312277B2 Array substrate for display device and method of fabricating the same 有权
    • Array substrate for display device and method of fabricating the same
    • US09312277B2
    • 2016-04-12
    • US14737078
    • 2015-06-11
    • LG DISPLAY CO., LTD.
    • Hee-Dong Choi
    • H01L27/14 , H01L27/12 , H01L29/49 , H01L29/786
    • H01L27/1222 , H01L27/12 , H01L27/124 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/1274 , H01L29/4908 , H01L29/78648
    • An array substrate for a display device includes: a substrate; first and second gate electrodes of impurity-doped polycrystalline silicon on the substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers of intrinsic polycrystalline silicon on the gate insulating layer, the first and second active layers corresponding to the first and second active layers, respectively; an interlayer insulating layer on the first and second active layers and including first to fourth active contact holes, the first and second active contact holes exposing side portions of the first active layer, the third and fourth active contact holes exposing side portions of the second active layer; first and second ohmic contact layers of impurity-doped amorphous silicon on the interlayer insulating layer, the first ohmic contact layer contacting the first active layer through the first and second active contact holes, the second ohmic contact layer contacting the second active layer through the third and fourth active contact hole; first source and drain electrodes on the first ohmic contact layer and second source and drain electrodes on the second ohmic contact layer; a data line on the interlayer insulating layer, the data line connected to the first source electrode; a first passivation layer on the first source and drain electrodes, the second source and drain electrodes and the data line; a gate line on the first passivation layer, the gate line connected to the first gate electrode and crossing the data line to define a pixel region; a second passivation layer on the gate line; and a pixel electrode on the second passivation layer, the pixel electrode connected to the second drain electrode.
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 6. 发明授权
      US09087751B2 Array substrate for display device and method of fabricating the same 有权
    • Array substrate for display device and method of fabricating the same
    • 用于显示装置的阵列基板及其制造方法
    • US09087751B2
    • 2015-07-21
    • US14166617
    • 2014-01-28
    • LG DISPLAY CO., LTD.
    • Hee-Dong Choi
    • H01L29/12 , H01L27/12 , H01L29/49 , H01L29/786
    • H01L27/1222 , H01L27/12 , H01L27/124 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/1274 , H01L29/4908 , H01L29/78648
    • An array substrate for a display device includes: a substrate; first and second gate electrodes of impurity-doped polycrystalline silicon on the substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers of intrinsic polycrystalline silicon on the gate insulating layer, the first and second active layers corresponding to the first and second active layers, respectively; an interlayer insulating layer on the first and second active layers and including first to fourth active contact holes, the first and second active contact holes exposing side portions of the first active layer, the third and fourth active contact holes exposing side portions of the second active layer; first and second ohmic contact layers of impurity-doped amorphous silicon on the interlayer insulating layer, the first ohmic contact layer contacting the first active layer through the first and second active contact holes, the second ohmic contact layer contacting the second active layer through the third and fourth active contact hole; first source and drain electrodes on the first ohmic contact layer and second source and drain electrodes on the second ohmic contact layer; a data line on the interlayer insulating layer, the data line connected to the first source electrode; a first passivation layer on the first source and drain electrodes, the second source and drain electrodes and the data line; a gate line on the first passivation layer, the gate line connected to the first gate electrode and crossing the data line to define a pixel region; a second passivation layer on the gate line; and a pixel electrode on the second passivation layer, the pixel electrode connected to the second drain electrode.
    • 用于显示装置的阵列基板包括：基板; 在衬底上的杂质掺杂多晶硅的第一和第二栅电极; 在第一和第二栅电极上的栅极绝缘层; 栅极绝缘层上的本征多晶硅的第一和第二有源层，分别对应于第一和第二有源层的第一和第二有源层; 在所述第一和第二有源层上的层间绝缘层，并且包括第一至第四有源接触孔，所述第一和第二有源接触孔暴露所述第一有源层的侧部，所述第三和第四有源接触孔暴露所述第二有源接触孔的侧部分 层; 所述第一和第二欧姆接触层在所述层间绝缘层上的杂质掺杂非晶硅，所述第一欧姆接触层通过所述第一和第二有源接触孔接触所述第一有源层，所述第二欧姆接触层通过所述第三有源层接触所述第二有源层， 和第四活动接触孔; 第一欧姆接触层上的第一源极和漏极电极以及第二欧姆接触层上的第二源极和漏极电极; 在所述层间绝缘层上的数据线，所述数据线与所述第一源极连接; 第一源极和漏极上的第一钝化层，第二源极和漏极以及数据线; 在第一钝化层上的栅极线，栅极线连接到第一栅电极并与数据线交叉以限定像素区域; 在栅极线上的第二钝化层; 以及在所述第二钝化层上的像素电极，所述像素电极连接到所述第二漏电极。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
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