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    • 7. 发明申请
    • DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    • 显示装置及其制造方法
    • US20130056732A1
    • 2013-03-07
    • US13366683
    • 2012-02-06
    • Suk Won JUNGSung Hoon YANGSang-Youn HANSeung Mi SEOMi-Seon SEO
    • Suk Won JUNGSung Hoon YANGSang-Youn HANSeung Mi SEOMi-Seon SEO
    • H01L31/0376
    • G06F3/042G02F1/13338G06F3/0412
    • A display device includes: a substrate; an infrared sensing transistor on the substrate; a readout transistor connected to the infrared sensing transistor; a power source line; and a light blocking member on the infrared sensing transistor, where the infrared sensing transistor includes a light blocking film on the substrate, a first gate electrode contacting and overlapping the light blocking film and connected to a power source line, a first semiconductor layer on the first gate electrode overlapping the light blocking film, and first source and drain electrodes on the first semiconductor layer, where the readout transistor includes a second gate electrode on the substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and second source and drain electrodes the second semiconductor layer, and where the power source line and the first gate electrode are at a same layer.
    • 显示装置包括:基板; 基板上的红外感测晶体管; 连接到红外感测晶体管的读出晶体管; 电源线; 以及所述红外感测晶体管上的遮光构件,其中所述红外感测晶体管在所述基板上包括遮光膜,与所述遮光膜接触并重叠并连接到电源线的第一栅电极, 与遮光膜重叠的第一栅电极以及第一半导体层上的第一源电极和漏电极,其中所述读出晶体管在所述衬底上包括第二栅电极,所述第二栅电极上的第二半导体层与所述第二栅电极重叠, 以及第二源极和漏极,第二半导体层,以及其中电源线和第一栅电极处于同一层。
    • 10. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20110095300A1
    • 2011-04-28
    • US12904281
    • 2010-10-14
    • Dae-Cheol KIMWoong-Kwon KIMSang-Youn HAN
    • Dae-Cheol KIMWoong-Kwon KIMSang-Youn HAN
    • H01L25/075H01L21/336
    • H01L27/1288H01L27/124
    • A manufacturing method of a thin film transistor array panel includes forming a gate line on a substrate and a gate insulating layer on the gate line, forming a semiconductor on the gate insulating layer, forming a first data line and a first drain electrode on the semiconductor, forming a lower passivation layer on the first data line and the first drain electrode, forming an upper passivation layer on the lower passivation layer and a metal layer on the upper passivation layer, etching the metal layer by using a photosensitive film as a mask to form a reflecting electrode and to expose the lower passivation layer, etching the exposed lower passivation layer to form a first contact hole exposing the first drain electrode, and forming a connection assistance member connecting the first drain electrode and the reflecting electrode through the first contact hole after removing the photosensitive film.
    • 一种薄膜晶体管阵列面板的制造方法,包括在栅极线上形成栅极线和栅极绝缘层,在栅极绝缘层上形成半导体,在半导体上形成第一数据线和第一漏极 在所述第一数据线和所述第一漏电极上形成下钝化层,在所述下钝化层上形成上钝化层,在所述上钝化层上形成金属层,通过使用感光膜作为掩模蚀刻所述金属层 形成反射电极并暴露下钝化层,蚀刻暴露的下钝化层以形成暴露第一漏极的第一接触孔,以及形成通过第一接触孔连接第一漏电极和反射电极的连接辅助构件 去除感光膜后。