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1. 发明申请

US20090201728A1 Erase Method of Flash Memory Device 有权
标题翻译：闪存设备的擦除方法
公开(公告)号：US20090201728A1
公开(公告)日：2009-08-13
申请号：US12424984
申请日：2009-04-16
申请人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
发明人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
IPC分类号： G11C16/02 , G11C16/16 , G11C16/06
CPC分类号： G11C16/12 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/16 , G11C16/3445 , G11C16/3459 , G11C2211/5621 , G11C2211/5642
摘要： Erase and program methods of a flash memory device including MLCs for increasing the program speed are described. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.
摘要翻译：描述包括用于增加程序速度的MLC的闪速存储器件的擦除和编程方法。在擦除方法中，MLC被预编程，使得可以减少分布有MLC的阈值电压的电压范围。因此，当擦除MLC时，可以降低失败发生率，可以提高MLC的阈值电压分布，并且可以在随后的程序操作中缩短整个编程时间。

2. 发明授权

US07539057B2 Erase and program method of flash memory device for increasing program speed of flash memory device 有权
标题翻译：闪存设备的擦除和编程方法，用于提高闪存设备的程序速度
公开(公告)号：US07539057B2
公开(公告)日：2009-05-26
申请号：US11275279
申请日：2005-12-21
申请人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
发明人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
IPC分类号： G11C16/12 , G11C16/34 , G11C16/06 , G11C16/04
CPC分类号： G11C16/12 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/16 , G11C16/3445 , G11C16/3459 , G11C2211/5621 , G11C2211/5642
摘要： Erase and program methods of a flash memory device including MLCs for increasing the program speed are described. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.
摘要翻译：描述包括用于增加程序速度的MLC的闪速存储器件的擦除和编程方法。在擦除方法中，MLC被预编程，使得可以减少分布有MLC的阈值电压的电压范围。因此，当擦除MLC时，可以减少故障发生率，可以提高MLC的阈值电压分布，并且可以在随后的程序操作中缩短整个编程时间。

3. 发明申请

US20090207660A1 PROGRAM METHOD OF FLASH MEMORY DEVICE 有权
标题翻译：闪存存储器件的程序方法
公开(公告)号：US20090207660A1
公开(公告)日：2009-08-20
申请号：US12425025
申请日：2009-04-16
申请人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
发明人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
IPC分类号： G11C16/02 , G11C16/06
CPC分类号： G11C16/12 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/16 , G11C16/3445 , G11C16/3459 , G11C2211/5621 , G11C2211/5642
摘要： Erase and program methods of a flash memory device including MLCs for increasing the program speed are described. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.
摘要翻译：描述包括用于增加程序速度的MLC的闪速存储器件的擦除和编程方法。在擦除方法中，MLC被预编程，使得可以减少分布有MLC的阈值电压的电压范围。因此，当擦除MLC时，可以减少故障发生率，可以提高MLC的阈值电压分布，并且可以在随后的程序操作中缩短整个编程时间。

4. 发明授权

US07990771B2 Program method of flash memory device 有权
标题翻译：闪存设备的程序方法
公开(公告)号：US07990771B2
公开(公告)日：2011-08-02
申请号：US12425025
申请日：2009-04-16
申请人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
发明人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
IPC分类号： G11C16/06 , G11C16/10 , G11C16/12 , G11C16/34
CPC分类号： G11C16/12 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/16 , G11C16/3445 , G11C16/3459 , G11C2211/5621 , G11C2211/5642
摘要： A method of erasing and programming a flash memory device including multi-level cells (MLCs). MLCs of a word line are selected and some of the MLCs are pre-programmed based on whether their individual threshold voltages are included in a first voltage range. The selected MLCs are pre-programmed with a pre-program (first) voltage; and the remaining MLCs are prohibited from pre-programming; then the remaining MLCs connected to the selected word line are programmed by applying a program (second) voltage that gradually rises from the pre-program voltage at a ratio of a step voltage n for the selected line.
摘要翻译：一种擦除和编程包括多电平单元（MLC）的闪速存储器件的方法。选择字线的MLC，并且基于它们的各自的阈值电压是否被包括在第一电压范围中，一些MLC被预先编程。所选择的MLC以预编程（第一）电压进行预编程; 其余的MLC被禁止进行预编程; 那么连接到所选择的字线的剩余MLC通过应用从预编程电压以所选行的阶梯电压n的比率逐渐上升的程序（第二）电压被编程。

5. 发明授权

US07978532B2 Erase method of flash memory device 有权
标题翻译：闪存设备的擦除方法
公开(公告)号：US07978532B2
公开(公告)日：2011-07-12
申请号：US12424984
申请日：2009-04-16
申请人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
发明人： Kyung Pil Hwang , Hyung Seok Kim , Keum Hwan Noh , Ju In Kim , Min Kyu Lee , Seok Jin Joo , Sook Kyung Kim
IPC分类号： G11C16/06 , G11C16/14 , G11C16/10
CPC分类号： G11C16/12 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/16 , G11C16/3445 , G11C16/3459 , G11C2211/5621 , G11C2211/5642
摘要： Erase and program methods of a flash memory device including MLCs for increasing the program speed. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation.
摘要翻译：包括用于增加程序速度的MLC的闪存设备的擦除和编程方法。在擦除方法中，MLC被预编程，使得可以减少分布有MLC的阈值电压的电压范围。因此，当擦除MLC时，可以减少故障发生率，可以提高MLC的阈值电压分布，并且可以在随后的程序操作中缩短整个编程时间。

6. 发明授权

US07623385B2 Method of reading flash memory device for depressing read disturb 有权
标题翻译：读取闪存设备以抑制读取干扰的方法
公开(公告)号：US07623385B2
公开(公告)日：2009-11-24
申请号：US11965191
申请日：2007-12-27
申请人： Nam Kyeong Kim , Ju Yeab Lee , Keum Hwan Noh
发明人： Nam Kyeong Kim , Ju Yeab Lee , Keum Hwan Noh
IPC分类号： G11C11/34
CPC分类号： G11C16/3418 , G11C16/0483 , G11C16/3427
摘要： Provided is a method of reading a flash memory device for depressing read disturb. According to the method, a first voltage is applied to a gate of the drain select transistor to turn on the drain select transistor, and a read voltage is applied to a gate of a selected transistor among the plurality of memory cells. Then, a pass voltage is applied to gates of unselected transistors among the plurality of memory cells. Furthermore, when the pass voltage is applied, a first pass voltage is applied and then a second pass voltage is applied after an elapse of a predetermined time following the applying of the first pass voltage. The second pass voltage has a level different from that of the first pass voltage.
摘要翻译：提供了一种读取用于按下读取干扰的闪速存储器件的方法。根据该方法，将第一电压施加到漏极选择晶体管的栅极以使漏极选择晶体管导通，并且将读取电压施加到多个存储单元中的选定晶体管的栅极。然后，对多个存储单元中的未选择晶体管的栅极施加通过电压。此外，当施加通过电压时，施加第一通过电压，然后在施加第一通过电压之后经过预定时间之后施加第二通过电压。第二通过电压具有与第一通过电压不同的电平。

7. 发明申请

US20090122617A1 SOFT PROGRAMMING METHOD OF NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件的软编程方法
公开(公告)号：US20090122617A1
公开(公告)日：2009-05-14
申请号：US12019947
申请日：2008-01-25
申请人： Keum Hwan Noh
发明人： Keum Hwan Noh
IPC分类号： G11C16/10
CPC分类号： G11C16/3404
摘要： A non-volatile memory device includes a first cell group including memory cells other than memory cells adjacent to a drain select transistor in a block, and a second cell group including the memory cells adjacent to the drain select transistor in the block. An erase operation is performed on the memory cells in the block. The first cell group is programmed by applying a first soft programming voltage to the first cell group. The second cell group is programmed by applying a second soft programming voltage to the second cell group.
摘要翻译：非易失性存储器件包括：第一单元组，其包括与块中的漏极选择晶体管相邻的存储单元以外的存储单元;以及包括与所述块中的漏极选择晶体管相邻的存储单元的第二单元组。对块中的存储单元执行擦除操作。通过对第一单元组施加第一软编程电压来对第一单元组进行编程。通过将第二软编程电压施加到第二单元组来编程第二单元组。

8. 发明申请

US20080298127A1 Method of Reading Flash Memory Device for Depressing Read Disturb 有权
标题翻译：阅读闪存设备的方法，用于抑制读取干扰
公开(公告)号：US20080298127A1
公开(公告)日：2008-12-04
申请号：US11965191
申请日：2007-12-27
申请人： Nam Kyeong Kim , Ju Yeab Lee , Keum Hwan Noh
发明人： Nam Kyeong Kim , Ju Yeab Lee , Keum Hwan Noh
IPC分类号： G11C16/26
CPC分类号： G11C16/3418 , G11C16/0483 , G11C16/3427
摘要： Provided is a method of reading a flash memory device for depressing read disturb. According to the method, a first voltage is applied to a gate of the drain select transistor to turn on the drain select transistor, and a read voltage is applied to a gate of a selected transistor among the plurality of memory cells. Then, a pass voltage is applied to gates of unselected transistors among the plurality of memory cells. Furthermore, when the pass voltage is applied, a first pass voltage is applied and then a second pass voltage is applied after an elapse of a predetermined time following the applying of the first pass voltage. The second pass voltage has a level different from that of the first pass voltage.
摘要翻译：提供了一种读取用于按下读取干扰的闪速存储器件的方法。根据该方法，将第一电压施加到漏极选择晶体管的栅极以使漏极选择晶体管导通，并且将读取电压施加到多个存储单元中的选定晶体管的栅极。然后，对多个存储单元中的未选择晶体管的栅极施加通过电压。此外，当施加通过电压时，施加第一通过电压，然后在施加第一通过电压之后经过预定时间之后施加第二通过电压。第二通过电压具有与第一通过电压不同的电平。

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