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1. 发明授权

US08595278B2 Method and system for unconstrained frequency domain adaptive filtering 失效
公开(公告)号：US08595278B2
公开(公告)日：2013-11-26
申请号：US12489735
申请日：2009-06-23
申请人： Kuoruey Han , Peiqing Wang , Linghsiao Wang , Kishore Kota , Arash Farhoodfar
发明人： Kuoruey Han , Peiqing Wang , Linghsiao Wang , Kishore Kota , Arash Farhoodfar
IPC分类号： G06F17/10 , G06F17/14 , H04B3/46 , H03H7/30
CPC分类号： H04B1/123 , H03H21/0027
摘要： Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients.

2. 发明申请

US20100228810A1 METHOD AND SYSTEM FOR UNCONSTRAINED FREQUENCY DOMAIN ADAPTIVE FILTERING 失效
标题翻译：用于不受约束的频域自适应滤波的方法和系统
公开(公告)号：US20100228810A1
公开(公告)日：2010-09-09
申请号：US12489735
申请日：2009-06-23
申请人： Kuoruey Han , Peiqing Wang , Linghsiao Wang , Kishore Kota , Arash Farhoodfar
发明人： Kuoruey Han , Peiqing Wang , Linghsiao Wang , Kishore Kota , Arash Farhoodfar
IPC分类号： G06F17/10 , G06F17/14
CPC分类号： H04B1/123 , H03H21/0027
摘要： Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients.
摘要翻译：用于无约束频域自适应滤波的方法和系统的方面包括可操作以选择当前滤波器分区中的一个或多个时域系数的一个或多个电路。可以基于对应的多个频域系数来计算所选择的一个或多个时域系数中的每一个的值。可以基于所计算的值来调整相应的多个频域系数。可以基于所计算的值来调整后续滤波器分区中的后续多个频域系数。可以基于经调整的相应多个频域系数在当前滤波器分区中处理输入信号。输入信号的时间调整版本可以在随后的滤波器分区中基于经调整的后续多个频域系数来处理。

3. 发明申请

US20080104158A1 Implementation of adaptive filters of reduced complexity 审中-公开
标题翻译：实现降低复杂度的自适应滤波器
公开(公告)号：US20080104158A1
公开(公告)日：2008-05-01
申请号：US11586111
申请日：2006-10-25
申请人： Arash Farhoodfar , Scott R. Powell , Peiqing Wang
发明人： Arash Farhoodfar , Scott R. Powell , Peiqing Wang
IPC分类号： G06F17/14
CPC分类号： H03H21/0027 , H04L2025/03477
摘要： Herein described is at least a method for implementing an adaptive digital filter of reduced implementation complexity. The method comprises computing at least one complex discrete Fourier transform of a complex data sequence using approximately one-half the number of points used in computing said discrete Fourier transform of a real valued sequence. Further, herein described is an adaptive digital filter of reduced implementation complexity. The adaptive digital filter comprises at least one circuitry for computing a complex discrete Fourier transform of a complex data sequence using approximately one-half the number of points used in computing the discrete Fourier transform of a real valued sequence. The adaptive digital filter may be employed in a 10 Gbit/sec Ethernet transceiver.
摘要翻译：这里描述了至少一种用于实现降低的实现复杂度的自适应数字滤波器的方法。该方法包括使用计算实值序列的所述离散傅立叶变换中使用的大约一半数量的点来计算复数数据序列的至少一个复数离散付里叶变换。此外，这里描述的是具有降低的实现复杂度的自适应数字滤波器。自适应数字滤波器包括至少一个电路，用于使用计算实值序列的离散傅立叶变换中使用的大约一半数量的点来计算复数数据序列的复数离散付里叶变换。自适应数字滤波器可用于10 Gbit / s以太网收发器。

4. 发明申请

US20110305173A1 PHASE AND FREQUENCY RE-LOCK IN SYNCHRONOUS ETHERNET DEVICES 有权
标题翻译：同步以太网设备中的相位和频率重新锁定
公开(公告)号：US20110305173A1
公开(公告)日：2011-12-15
申请号：US13156228
申请日：2011-06-08
申请人： Peiqing Wang , Xiaotong Lin , Mehmet Tazebay , Linghsiao Wang
发明人： Peiqing Wang , Xiaotong Lin , Mehmet Tazebay , Linghsiao Wang
IPC分类号： H04L5/14 , H04L5/16
CPC分类号： H04L12/4625 , H04J3/0641 , H04J3/0644 , H04J3/0658 , H04J3/0688
摘要： A first PHY may be coupled to a second PHY via a network link. The first PHY may transition from a role of timing master for the network link to a role of timing slave for the network link. During a first time interval subsequent to the transition, the PHYs may communicate half-duplex over the link while the first PHY synchronizes to a transmit clock of the second PHY. During a second time interval, the PHYs may communicate full-duplex while the second Ethernet PHY synchronizes to a transmit clock of the first PHY. Also during the second time interval, the first PHY may determine that the first PHY and the second PHY are synchronized. Subsequent to the determination, the PHYs may begin full-duplex communication of data on the network link.
摘要翻译：第一PHY可以经由网络链路耦合到第二PHY。第一PHY可以从网络链路的定时主机的角色转变为网络链路的定时从站的角色。在转换之后的第一时间间隔期间，PHY可以在第一PHY同步到第二PHY的发送时钟的同时通过链路进行半双工。在第二时间间隔期间，PHY可以全双工通信，而第二以太网PHY与第一PHY的发送时钟同步。同样在第二时间间隔期间，第一PHY可以确定第一PHY和第二PHY是同步的。在确定之后，PHY可以开始网络链路上的数据的全双工通信。

5. 发明授权

US08621255B2 System and method for loop timing update of energy efficient physical layer devices using subset communication techniques 有权
标题翻译：使用子集通信技术的节能物理层设备的环路定时更新的系统和方法
公开(公告)号：US08621255B2
公开(公告)日：2013-12-31
申请号：US12749405
申请日：2010-03-29
申请人： Peiqing Wang , Linghsiao Wang , Mehmet Tazebay , Scott Powell
发明人： Peiqing Wang , Linghsiao Wang , Mehmet Tazebay , Scott Powell
IPC分类号： G06F1/00 , G06F1/26 , G06F1/32 , H04L7/00 , G11B20/20
CPC分类号： G06F1/3203 , H04L27/0014 , H04L2027/0026 , H04L2027/0036 , H04L2027/0059 , H04L2027/0065 , H04L2027/0067 , Y02D10/126
摘要： A system and method for loop timing update of energy efficient physical layer devices using subset communication techniques. During a quiet period during which a subset of communication channels are transitioned from an active mode to a low-power mode, circuitry in the active channel can be designed to track, on behalf of the inactive channels, the phase drift due to the frequency offset. This tracking of the frequency estimation error would reduce the time required to perform a timing update for the communication channels when transitioning back to the active mode.
摘要翻译：使用子集通信技术的能量效率物理层设备的环路定时更新的系统和方法。在其中通信信道的子集从活动模式转换到低功率模式的安静时段期间，有源信道中的电路可以被设计为代表无效信道跟踪由于频率偏移引起的相位漂移。频率估计误差的跟踪将减少在转换回主动模式时对通信信道执行定时更新所需的时间。

6. 发明授权

US08565270B2 Phase and frequency re-lock in synchronous ethernet devices 有权
标题翻译：同步以太网设备中的相位和频率重新锁定
公开(公告)号：US08565270B2
公开(公告)日：2013-10-22
申请号：US13156228
申请日：2011-06-08
申请人： Peiqing Wang , Xiaotong Lin , Mehmet Tazebay , Linghsiao Wang
发明人： Peiqing Wang , Xiaotong Lin , Mehmet Tazebay , Linghsiao Wang
IPC分类号： H04J3/06
CPC分类号： H04L12/4625 , H04J3/0641 , H04J3/0644 , H04J3/0658 , H04J3/0688
摘要： A first PHY may be coupled to a second PHY via a network link. The first PHY may transition from a role of timing master for the network link to a role of timing slave for the network link. During a first time interval subsequent to the transition, the PHYs may communicate half-duplex over the link while the first PHY synchronizes to a transmit clock of the second PHY. During a second time interval, the PHYs may communicate full-duplex while the second Ethernet PHY synchronizes to a transmit clock of the first PHY. Also during the second time interval, the first PHY may determine that the first PHY and the second PHY are synchronized. Subsequent to the determination, the PHYs may begin full-duplex communication of data on the network link.
摘要翻译：第一PHY可以经由网络链路耦合到第二PHY。第一PHY可以从网络链路的定时主机的角色转变为网络链路的定时从站的角色。在转换之后的第一时间间隔期间，PHY可以在第一PHY同步到第二PHY的发送时钟的同时通过链路进行半双工。在第二时间间隔期间，PHY可以全双工通信，而第二以太网PHY与第一PHY的发送时钟同步。同样在第二时间间隔期间，第一PHY可以确定第一PHY和第二PHY是同步的。在确定之后，PHY可以开始网络链路上的数据的全双工通信。

7. 发明授权

US08619755B2 Systems and methods for providing a dual-master mode in a synchronous ethernet environment 有权
标题翻译：在同步以太网环境中提供双主模式的系统和方法
公开(公告)号：US08619755B2
公开(公告)日：2013-12-31
申请号：US12983600
申请日：2011-01-03
申请人： Peiqing Wang , Linghsiao Wang
发明人： Peiqing Wang , Linghsiao Wang
IPC分类号： H04J3/06 , H04L12/28 , H04L7/04 , H03D3/24
CPC分类号： H04J3/0688 , H03L7/18 , H04J3/0697 , H04L12/413
摘要： Embodiments of a dual-master mode Ethernet node are provided herein. The dual-master mode Ethernet node includes a first multiplexer configured to select between a local oscillator signal and a primary reference source (PRS) signal to provide a reference clock signal, a digital phase-locked loop (DPLL) configured to generate a master clock signal based on the reference clock signal, a phase rotator configured to rotate a phase of the master clock signal based on a frequency error between the master clock signal and an extracted clock signal to generate a slave clock signal, and a second multiplexer configured to select between the master clock signal and the slave clock signal to provide a transmit clock signal. The dual-master mode Ethernet node can dynamically generate the transmit clock based on either the extracted clock or the PRS without re-performing the auto-negotiation process.
摘要翻译：双主模式以太网节点的实施例在此提供。双主模式以太网节点包括第一多路复用器，其被配置为在本地振荡器信号和主参考源（PRS）信号之间进行选择以提供参考时钟信号;数字锁相环（DPLL），被配置为产生主时钟基于参考时钟信号的信号;相位旋转器，被配置为基于主时钟信号和提取的时钟信号之间的频率误差旋转主时钟信号的相位，以产生从时钟信号，以及第二多路复用器，被配置为选择在主时钟信号和从时钟信号之间提供发送时钟信号。双主模式以太网节点可以基于提取的时钟或PRS动态生成发送时钟，而无需重新执行自动协商过程。

8. 发明申请

US20110202781A1 System and Method for Loop Timing Update of Energy Efficient Physical Layer Devices Using Subset Communication Techniques 有权
标题翻译：使用子集通信技术的能量有效物理层设备的循环时序更新的系统和方法
公开(公告)号：US20110202781A1
公开(公告)日：2011-08-18
申请号：US12749405
申请日：2010-03-29
申请人： Peiqing Wang , Linghsiao Wang , Mehmet Tazebay , Scott Powell
发明人： Peiqing Wang , Linghsiao Wang , Mehmet Tazebay , Scott Powell
IPC分类号： G06F1/32 , G06F1/00 , G06F11/00
CPC分类号： G06F1/3203 , H04L27/0014 , H04L2027/0026 , H04L2027/0036 , H04L2027/0059 , H04L2027/0065 , H04L2027/0067 , Y02D10/126
摘要： A system and method for loop timing update of energy efficient physical layer devices using subset communication techniques. During a quiet period during which a subset of communication channels are transitioned from an active mode to a low-power mode, circuitry in the active channel can be designed to track, on behalf of the inactive channels, the phase drift due to the frequency offset. This tracking of the frequency estimation error would reduce the time required to perform a timing update for the communication channels when transitioning back to the active mode.
摘要翻译：使用子集通信技术的能量效率物理层设备的环路定时更新的系统和方法。在其中通信信道的子集从活动模式转换到低功率模式的安静时段期间，有源信道中的电路可以被设计为代表无效信道跟踪由于频率偏移引起的相位漂移。频率估计误差的跟踪将减少在转换回主动模式时对通信信道执行定时更新所需的时间。

9. 发明授权

US07936777B2 Parallel detection of remote LPI request and send zero mode 有权
标题翻译：并行检测远程LPI请求并发送零模式
公开(公告)号：US07936777B2
公开(公告)日：2011-05-03
申请号：US12488232
申请日：2009-06-19
申请人： Peiqing Wang , Xiaotong Lin
发明人： Peiqing Wang , Xiaotong Lin
IPC分类号： H04L12/66
CPC分类号： H04L43/00 , H04L12/12 , Y02D50/40 , Y02D50/42
摘要： Embodiments of the present invention enable robust and quick parallel detection of the remote LPI request signal (rem_lpi_req) and SEND ZERO mode (SEND_Z) defined in the Energy Efficient Ethernet (EEE) standard. Embodiments do not rely on energy detection for detecting SEND_Z. Therefore, SEND_Z can be detected reliably and with minimal latency. In addition, since SEND_Z and rem_lpi_req are detected in parallel, embodiments are not concerned with the false detection of rem_lpi_req (before SEND_Z is detected) or the need to disable detection of rem_lpi_req (after SEND_Z is detected).
摘要翻译：本发明的实施例能够实现在能效以太网（EEE）标准中定义的远程LPI请求信号（rem_lpi_req）和SEND ZERO模式（SEND_Z）的鲁棒且快速的并行检测。实施例不依赖于检测SEND_Z的能量检测。因此，可以可靠地检测SEND_Z并以最小的延迟。另外，由于并行地检测到SEND_Z和rem_lpi_req，实施例不涉及rem_lpi_req的错误检测（在检测到SEND_Z之前）或者需要禁止检测rem_lpi_req（在检测到SEND_Z之后）。

10. 发明授权

US07636388B2 Channel fault detection for channel diagnostic systems 有权
标题翻译：通道诊断系统的通道故障检测
公开(公告)号：US07636388B2
公开(公告)日：2009-12-22
申请号：US11094273
申请日：2005-03-31
申请人： Peiqing Wang , Scott R. Powell
发明人： Peiqing Wang , Scott R. Powell
IPC分类号： H04B3/46
CPC分类号： H04M3/085 , H04B3/46
摘要： A method and computer program product for detecting faults in cables. The invention comprises receiving a first reflected signal; comparing the first reflected signal amplified with a first predetermined receiver gain setting with a first threshold; if the value of the amplified first reflected signal is greater than the value of the first threshold, then terminating detecting; if the value of the amplified first reflected signal is not greater than the value of the first threshold, then comparing a second reflected signal amplified with a second predetermined gain setting different from the first gain setting with a second threshold.
摘要翻译：一种用于检测电缆故障的方法和计算机程序产品。本发明包括接收第一反射信号; 将放大的第一反射信号与第一预定接收机增益设置与第一阈值进行比较; 如果放大的第一反射信号的值大于第一阈值的值，则终止检测; 如果放大的第一反射信号的值不大于第一阈值的值，则将与第一增益设置不同的第二预定增益设置放大的第二反射信号与第二阈值进行比较。

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