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1. 发明授权

US08604844B2 Output circuit 有权
标题翻译：输出电路
公开(公告)号：US08604844B2
公开(公告)日：2013-12-10
申请号：US13195546
申请日：2011-08-01
申请人： Kouichi Nishimura , Hiromichi Ohtsuka , Toshikazu Murata
发明人： Kouichi Nishimura , Hiromichi Ohtsuka , Toshikazu Murata
IPC分类号： H03K3/00
CPC分类号： H03K19/018528
摘要： An output circuit includes a first output transistor disposed between a higher-potential power supply terminal and an external output terminal, a current flowing from the source of the first output transistor to the drain thereof being controlled on the basis of an external input signal; a second output transistor disposed between a lower-potential power supply terminal and the external output terminal, a current flowing from the source of the second output transistor to the drain thereof being controlled on the basis of an external input signal; and a clamping transistor having a first terminal and a control terminal, the first terminal and the control terminal being coupled to the gate of the first output transistor, and a second terminal coupled to the drain of the first output transistor.
摘要翻译：输出电路包括设置在高电位电源端子和外部输出端子之间的第一输出晶体管，基于外部输入信号控制从第一输出晶体管的源极到其漏极的电流; 设置在低电位电源端子和外部输出端子之间的第二输出晶体管，基于外部输入信号控制从第二输出晶体管的源极流向其漏极的电流; 以及具有第一端子和控制端子的钳位晶体管，所述第一端子和所述控制端子耦合到所述第一输出晶体管的栅极，以及耦合到所述第一输出晶体管的漏极的第二端子。

2. 发明授权

US08427236B2 Operational amplifier, driver and display 有权
标题翻译：运算放大器，驱动器和显示器
公开(公告)号：US08427236B2
公开(公告)日：2013-04-23
申请号：US12662457
申请日：2010-04-19
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , G09G3/3614 , G09G3/3688 , G09G2310/0291 , G09G2330/021 , H03F3/3028 , H03F2203/45562 , H03F2203/45614 , H03F2203/45616 , H03F2203/45618 , H03F2203/45644 , H03F2203/45724 , H03F2203/45728
摘要： An operational amplifier includes an input differential stage having one external input receiving an external input voltage and two outputs; and two output stages. A switch section is provided between inputs of the two output stages and the two outputs of the input differential stage, and is configured to alternately connect the two outputs of the input differential stage and inputs of a positive-only output stage of the two output stages; and the two outputs of the input differential stage and inputs of a negative-only output stage of the two output stages.
摘要翻译：运算放大器包括输入差分级，其具有接收外部输入电压和两个输出的一个外部输入; 和两个输出级。在两个输出级的输入端和输入差分级的两个输出端之间提供开关部分，并且被配置为交替地连接输入差分级的两个输出和两个输出级的仅正输出级的输入 ; 输入差分级的两个输出和两个输出级的仅负输出级的输入。

3. 发明授权

US08421727B2 Transmitter circuit, transmission circuit and driver unit 失效
标题翻译：变送器电路，传输电路和驱动单元
公开(公告)号：US08421727B2
公开(公告)日：2013-04-16
申请号：US13436640
申请日：2012-03-30
申请人： Akio Hosokawa , Kouichi Nishimura
发明人： Akio Hosokawa , Kouichi Nishimura
IPC分类号： G09G3/36 , H03K19/094 , H03K3/00 , H03B1/00
CPC分类号： G09G3/20 , G09G2310/0267 , G09G2310/0275 , G09G2370/08 , H03K5/1534 , H04L25/0272 , H04L25/0286
摘要： A transmitter circuit includes a driver circuit including a non-inverting output terminal and an inverting output terminal for outputting a signal current, which has a loop direction that changes based upon an input signal, to the non-inverting output terminal and the inverting output terminal and an output-waveform control circuit for detecting a waveform edge of the input signal and responding by increasing the signal current temporarily. The output-waveform control circuit includes a first inverter circuit receiving a non-inverted input signal, a first capacitor including one end connected to an output terminal of the first inverter circuit and another end connected to the inverting output terminal, a second inverter circuit receiving an inverted input signal, and a second capacitor including one end connected to an output terminal of the second inverter circuit and another end connected to the non-inverting output terminal.
摘要翻译：发射机电路包括：驱动器电路，包括非反相输出端子和反相输出端子，用于将具有基于输入信号改变的环路方向的信号电流输出到非反相输出端子和反相输出端子以及输出波形控制电路，用于检测输入信号的波形边缘，并通过临时增加信号电流进行响应。输出波形控制电路包括接收非反相输入信号的第一反相器电路，第一电容器，其包括连接到第一反相器电路的输出端的一端和连接到反相输出端的另一端，第二反相器电路接收反相输入信号和第二电容器，其包括连接到第二反相器电路的输出端的一端和连接到非反相输出端的另一端。

4. 发明申请

US20130003745A1 INFORMATION SYSTEM, CONTROL DEVICE, METHOD OF MANAGING VIRTUAL NETWORK, AND PROGRAM 审中-公开
标题翻译：信息系统，控制设备，虚拟网络管理方法和程序
公开(公告)号：US20130003745A1
公开(公告)日：2013-01-03
申请号：US13634538
申请日：2011-03-22
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： H04L12/56
CPC分类号： H04L12/56 , H04L12/4641 , H04L45/02
摘要： An information system includes a plurality of forwarding nodes having a packet processing unit that performs processing of a received packet using a processing rule conforming to the received packet; and a control device causing plurality of forwarding nodes to operate as a virtual network by setting a processing rule in the forwarding nodes. The control device includes a virtual network path information storage unit that stores a correspondence relationship between the virtual network and a forwarding path configured by the forwarding nodes; and a virtual network control unit that identifies a virtual network affected by a change in a state of any forwarding node among the plurality of forwarding nodes, by referring to the virtual network path information storage unit.
摘要翻译：一种信息系统，包括具有分组处理单元的多个转发节点，所述分组处理单元使用符合所接收到的分组的处理规则来执行接收分组的处理; 以及控制装置，通过在转发节点中设置处理规则，使多个转发节点作为虚拟网络进行操作。控制装置包括存储虚拟网络与由转发节点配置的转发路径之间的对应关系的虚拟网络路径信息存储单元; 以及虚拟网络控制单元，通过参照虚拟网络路径信息存储单元来识别受到多个转发节点中的任何转发节点的状态的改变的影响的虚拟网络。

5. 发明授权

US08068080B2 Display apparatus, source driver, and display panel driving method 有权
标题翻译：显示装置，源驱动器和显示面板驱动方法
公开(公告)号：US08068080B2
公开(公告)日：2011-11-29
申请号：US12000613
申请日：2007-12-14
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/3614 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2320/0204 , G09G2320/0233
摘要： A liquid crystal display apparatus includes a liquid crystal display panel having a data line and a source driver for supplying a data signal to the data line based on a polarity signal. A polarity of the data signal is determined based on the polarity signal. The source driver includes an offset cancel control circuit for generating an offset cancel control signal and an output amplifier used to generate the data signal. The output amplifier is constructed so as to invert a polarity of an offset voltage based on the offset cancel control signal. The offset cancel control signal is generated based on the polarity signal.
摘要翻译：液晶显示装置包括具有数据线的液晶显示面板和用于根据极性信号向数据线提供数据信号的源极驱动器。基于极性信号确定数据信号的极性。源极驱动器包括用于产生偏移消除控制信号的偏移消除控制电路和用于产生数据信号的输出放大器。输出放大器被构造成基于偏移消除控制信号反转偏移电压的极性。基于极性信号产生偏移消除控制信号。

6. 发明申请

US20100271129A1 Output circuit using analog amplifier 有权
标题翻译：输出电路采用模拟放大器
公开(公告)号：US20100271129A1
公开(公告)日：2010-10-28
申请号：US12662626
申请日：2010-04-26
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/3022 , H03F2203/30078 , H03F2203/30111 , H03F2203/45528 , H03F2203/45631
摘要： An output circuit includes an analog amplifier circuit including a differential amplifier stage configured to receive an input voltage, and first to nth output systems (n is a natural number more than 1); first to nth output nodes; an output pad; and first to nth electrostatic protection resistances. An ith output system (i is a natural number between 2 and n) of the first to nth output systems includes an ith PMOS transistor having a drain connected with the ith output node of the first to nth output nodes and a gate connected with a first output of the differential amplifier stage; and an ith NMOS transistor having a drain connected with the ith output node and a gate connected with a second output of the differential amplifier stage. The first to nth electrostatic protection resistances are respectively connected between the first to nth output nodes and the output pad.
摘要翻译：输出电路包括：模拟放大器电路，包括被配置为接收输入电压的差分放大器级，以及第一至第n输出系统（n是大于1的自然数）; 第一到第n个输出节点; 输出板和第一至第n静电保护电阻。第一至第n输出系统中的第i个输出系统（i是2和n之间的自然数）包括具有与第一至第n输出节点的第i个输出节点连接的漏极的第i个PMOS晶体管，以及与第一个输出差分放大器级; 以及具有与第i个输出节点连接的漏极和与差分放大器级的第二输出端连接的栅极的第i个NMOS晶体管。第一至第n静电保护电阻分别连接在第一至第N输出节点和输出板之间。

7. 发明申请

US20090303210A1 Display panel driver and display device 有权
标题翻译：显示面板驱动程序和显示设备
公开(公告)号：US20090303210A1
公开(公告)日：2009-12-10
申请号：US12461112
申请日：2009-07-31
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： G09G5/00
CPC分类号： G09G3/3688 , G09G2310/0291 , G09G2330/021
摘要： Provided is a display panel driver with an improved driving characteristic by use of an amplifier output having excellent symmetry of an output characteristic. The display panel driver according to the present invention includes a first input differential stage circuit, a first output stage circuit, a second output stage circuit, and a first switch circuit. The first input differential stage circuit outputs two first input stage output signals according to one of a positive voltage and a negative voltage. The first switch circuit selects one of the first and second output stage circuits, and connects the selected circuit to the first input differential stage circuit. The output stage circuit connected to the first input differential stage circuit outputs a single-ended signal based on the two first input stage output signals from the first input differential stage circuit.
摘要翻译：提供了通过使用具有优异的输出特性对称性的放大器输出而具有改进的驱动特性的显示面板驱动器。根据本发明的显示面板驱动器包括第一输入差分级电路，第一输出级电路，第二输出级电路和第一开关电路。第一输入差分电路根据正电压和负电压之一输出两个第一输入级输出信号。第一开关电路选择第一和第二输出级电路中的一个，并将所选择的电路连接到第一输入差分级电路。连接到第一输入差分级电路的输出级电路基于来自第一输入差分级电路的两个第一输入级输出信号输出单端信号。

8. 发明申请

US20080143665A1 Display apparatus, source driver, and display panel driving method 有权
标题翻译：显示装置，源驱动器和显示面板驱动方法
公开(公告)号：US20080143665A1
公开(公告)日：2008-06-19
申请号：US12000613
申请日：2007-12-14
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3677 , G09G3/3614 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2320/0204 , G09G2320/0233
摘要： To automatically control a spatial cycle at which a polarity of an offset voltage is inverted corresponding to a spatial cycle at which a polarity of a data signal is inverted, and satisfactorily maintain the quality of the display image, the present invention provides a liquid crystal display apparatus including a liquid crystal display panel (1) having a data line (11) and a source driver (3) for supplying a data signal to the data line (11) based on a polarity signal (POL). A polarity of the data signal is determined based on the polarity signal (POL). The source driver (3) includes an offset cancel control circuit (40) for generating an offset cancel control signal (OCC) and an output amplifier (38) used to generate the data signal. The output amplifier (38) is constructed so as to invert a polarity of an offset voltage based on the offset cancel control signal (OCC). The offset cancel control signal (OCC) is generated based on the polarity signal (POL).
摘要翻译：为了自动控制偏移电压的极性与数据信号的极性反转的空间周期相反的空间循环，并且令人满意地保持显示图像的质量，本发明提供了一种液晶显示器包括具有数据线（11）的液晶显示面板（1）和用于根据极性信号（POL）将数据信号提供给数据线（11）的源极驱动器（3）的装置。基于极性信号（POL）来确定数据信号的极性。源极驱动器（3）包括用于产生偏移消除控制信号（OCC）的偏移消除控制电路（40）和用于产生数据信号的输出放大器（38）。输出放大器（38）被构造为基于偏移消除控制信号（OCC）反转偏移电压的极性。基于极性信号（POL）产生偏移消除控制信号（OCC）。

9. 发明申请

US20080129718A1 Capacitive load driving circuit, method of driving capacitive load, method of driving liquid crystal display device 有权
标题翻译：电容负载驱动电路，驱动电容性负载的方法，驱动液晶显示装置的方法
公开(公告)号：US20080129718A1
公开(公告)日：2008-06-05
申请号：US11984036
申请日：2007-11-13
申请人： Kouichi Nishimura , Takashi Nose
发明人： Kouichi Nishimura , Takashi Nose
IPC分类号： G09G5/00 , G09G3/36 , H03K17/12
CPC分类号： H03K17/122 , G09G3/2011 , G09G3/3688 , G09G2310/02 , G09G2310/027 , G09G2310/0289 , G09G2310/066
摘要： A capacitive load driving circuit includes a gate driver, and a source driver. The gate driver drives a plurality of capacitive loads arranged in a matrix form in a row direction. The source driver drives the plurality of capacitive loads in a column direction. The source driver includes a plurality of output circuits configured to be arranged in a row direction. Each of the plurality of output circuits changes a slew rate based on a column position of a capacitive load of the plurality of capacitive loads driven by the gate driver.
摘要翻译：电容性负载驱动电路包括栅极驱动器和源极驱动器。栅极驱动器以行方向驱动以矩阵形式布置的多个电容性负载。源极驱动器在列方向驱动多个容性负载。源极驱动器包括配置为沿行方向布置的多个输出电路。多个输出电路中的每一个基于由栅极驱动器驱动的多个容性负载的容性负载的列位置来改变压摆率。

10. 发明授权

US07352243B2 Voltage comparator circuit 有权
标题翻译：电压比较电路
公开(公告)号：US07352243B2
公开(公告)日：2008-04-01
申请号：US11148195
申请日：2005-06-09
申请人： Kouichi Nishimura
发明人： Kouichi Nishimura
IPC分类号： H03F3/45
CPC分类号： H03F3/45219 , H03F3/45192 , H03F2203/45248 , H03F2203/45366 , H03F2203/45644 , H03F2203/45651
摘要： A voltage comparator that realizes high-speed operation with a simple structure includes an input differential stage having a first differential pair and a second differential pair, into which a differential voltage is inputted from differential input terminals In+ and In−, with reverse polarity to each other, folded cascode-type differential stages, which adds a differential output signal of the first differential pair and a differential output signal of the second differential pair and is connected to a differential output of the input differential stage, and oppositely disposed first and second current mirror circuits, which receive differential outputs of the folded cascode-type differential stages into their respective inputs, with reverse polarity to each other and their outputs connected in common to an output terminal. The folded cascode-type differential stage adds the differential output signal of the first differential pair and the differential output signal of the second differential pair.
摘要翻译：以简单结构实现高速运行的电压比较器包括具有第一差分对和第二差分对的输入差分级，差分电压从差分输入端子In + +和/ 在^{- 中，彼此具有相反的极性，折叠共源共栅型差分级，其添加第一差分对的差分输出信号和第二差分对的差分输出信号，并连接到输入差分级的差分输出和相对布置的第一和第二电流镜电路，其将折叠的共源共栅型差分级的差分输出接收到它们各自的输入中，彼此具有相反的极性，并且它们的输出共同地连接到输出终奌站。折叠的共源共栅型差分级将第一差分对的差分输出信号和第二差分对的差分输出信号相加。}

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