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    • 1. 发明申请
    • Fail-safe controller
    • 故障安全控制器
    • US20050080492A1
    • 2005-04-14
    • US10891360
    • 2004-07-13
    • Kotaro ShimamuraNaohiro IkedaTakeshi Takehara
    • Kotaro ShimamuraNaohiro IkedaTakeshi Takehara
    • G06F11/18G05B9/03G05B13/02
    • G05B9/03
    • A controller that receives an input of a status of an apparatus, executes predetermined arithmetic and logical operations, and outputs a control signal of the apparatus, and is equipped with a plurality of processors for executing the arithmetic and logical operations; a plurality of data storage elements for storing respective results of the arithmetic and logical operations of the plurality of the processors; a comparator for comparing the results of the arithmetic and logical operations of the plurality of the processors stored in the plurality of the data storage elements; and a comparison record storage element for storing a record of the comparison results of the comparator.
    • 接收设备状态的输入的控制器,执行预定的算术和逻辑运算,并输出设备的控制信号,并配备有用于执行算术和逻辑运算的多个处理器; 多个数据存储元件,用于存储多个处理器的算术和逻辑运算的各个结果; 比较器,用于比较存储在多个数据存储元件中的多个处理器的算术和逻辑运算的结果; 以及用于存储比较器的比较结果的记录的比较记录存储元件。