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    • 5. 发明授权
    • Non-volatile semiconductor storage system
    • 非易失性半导体存储系统
    • US07952958B2
    • 2011-05-31
    • US12507366
    • 2009-07-22
    • Kosuke YanagidairaToshihiro SuzukiNaoya Tokiwa
    • Kosuke YanagidairaToshihiro SuzukiNaoya Tokiwa
    • G11C8/00
    • G11C16/349
    • There is provided a non-volatile memory having electrically rewritable non-volatile memory cells arranged therein. A controller controls operation at the non-volatile memory. The non-volatile memory comprises a status output section configured to output status information indicating a status of read operation, write operation or erase operation in the non-volatile memory cell. The controller comprises a control signal generating section configured to output a control signal for a certain operation in the non-volatile memory, and a control signal switching section configured to instruct the control signal generating section to switch the control signal based on the status information.
    • 提供了一种其中布置有电可重写非易失性存储单元的非易失性存储器。 控制器控制非易失性存储器的操作。 非易失性存储器包括状态输出部分,被配置为在非易失性存储器单元中输出指示读取操作,写入操作或擦除操作的状态的状态信息。 所述控制器包括:控制信号生成部,被配置为输出用于所述非易失性存储器中的某个操作的控制信号;以及控制信号切换部,被配置为指示所述控制信号生成部基于所述状态信息来切换所述控制信号。
    • 6. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD
    • 非易失性半导体存储器件和控制方法
    • US20090237993A1
    • 2009-09-24
    • US12407977
    • 2009-03-20
    • Kosuke YanagidairaToshihiro Suzuki
    • Kosuke YanagidairaToshihiro Suzuki
    • G11C16/04G11C16/06
    • G11C16/0483G11C11/5628G11C16/10G11C16/3418G11C16/3454G11C16/3459G11C2211/5621
    • The nonvolatile semiconductor memory device related to the present invention includes a plurality of memory cells, a read/program circuit which supplies a program voltage and a program verification voltage to the plurality of memory cells and desired data is programmed, supplies a first program verification voltage to the plurality of memory cells and then supplies a second program verification voltage to the plurality of memory cells when programming the data, and a read/program control circuit which determines memory cells which reach a first data program state and memory cells which do not reach the first data program state when supplying the first program verification voltage, and determines memory cells which reach a second data program state and memory cells which do not reach the second data program state when supplying the second program verification voltage, and supplies a program control voltage which changes the program operation state for each memory cell.
    • 与本发明有关的非易失性半导体存储器件包括多个存储器单元,向多个存储器单元提供编程电压和程序验证电压的读取/编程电路,并且对所需的数据进行编程,提供第一程序验证电压 并且然后在对数据进行编程时向多个存储单元提供第二程序验证电压,以及确定达到第一数据程序状态的存储单元的读/程控制电路和不能达到的存储单元 提供第一程序验证电压时的第一数据程序状态,以及当提供第二程序验证电压时确定达到第二数据程序状态的存储单元和未达到第二数据程序状态的存储单元,并且提供程序控制电压 这改变了每个存储单元的程序运行状态。