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    • 1. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME
    • 非易失性半导体存储器件及其制造方法
    • US20100283098A1
    • 2010-11-11
    • US12752758
    • 2010-04-01
    • Koji YOSHIDAKeita TAKAHASHI
    • Koji YOSHIDAKeita TAKAHASHI
    • H01L27/115H01L21/8246
    • H01L27/11568H01L29/4234H01L29/792
    • A nonvolatile semiconductor memory device includes a plurality of bit line diffusion layers formed in a semiconductor region, and extending in a row direction; a plurality of first insulating films, each being formed on the semiconductor region and between adjacent two of the bit line diffusion layers, and including a charge trapping film; a plurality of bit line insulating films formed above the respective bit line diffusion layers; and a plurality of word lines formed above the semiconductor region to cover the first insulating films and the bit line insulating films, intersecting the bit line diffusion layers, and extending in a column direction. The bit line insulating films have smaller thicknesses than the first insulating films, and upper surfaces of the bit line insulating films are parallel to upper surfaces of the first insulating films.
    • 非易失性半导体存储器件包括形成在半导体区域中并沿行方向延伸的多个位线扩散层; 多个第一绝缘膜,分别形成在半导体区域和相邻的两个位线扩散层之间,并且包括电荷捕获膜; 形成在各位线扩散层上方的多个位线绝缘膜; 以及形成在所述半导体区域上方以覆盖与所述位线扩散层交叉并沿列方向延伸的所述第一绝缘膜和所述位线绝缘膜的多个字线。 位线绝缘膜比第一绝缘膜具有更小的厚度,并且位线绝缘膜的上表面平行于第一绝缘膜的上表面。
    • 3. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD FOR THE SAME
    • 半导体存储器件及其驱动方法
    • US20090185427A1
    • 2009-07-23
    • US12352839
    • 2009-01-13
    • Keita TAKAHASHI
    • Keita TAKAHASHI
    • G11C16/06H01L29/792
    • H01L27/115H01L27/11568
    • The semiconductor memory device includes: a first well of a first conductivity type, a second well of the first conductivity type and a third well of a second conductivity type formed in a substrate: a diffusion bit line extending in a row direction and a word line extending in a column direction both formed in the second well; a plurality of semiconductor memory elements arranged in a matrix, each connected with the diffusion bit line and the word line; a selection transistor formed in the first well for applying a voltage to the diffusion bit line; and a forward diode formed of a diffusion layer of the first conductivity type formed in the third well and the third well. The diffusion bit line, the forward diode and the source of the selection transistor are electrically connected with one another.
    • 半导体存储器件包括:第一导电类型的第一阱,第一导电类型的第二阱和形成在衬底中的第二导电类型的第三阱:沿行方向延伸的扩散位线和字线 沿列方向延伸,两者都形成在第二井中; 布置成矩阵的多个半导体存储元件,每个半导体存储元件分别与扩散位线和字线连接; 形成在所述第一阱中的用于向所述扩散位线施加电压的选择晶体管; 以及由形成在第三阱和第三阱中的第一导电类型的扩散层形成的正向二极管。 扩散位线,正向二极管和选择晶体管的源极彼此电连接。
    • 4. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE
    • 半导体存储器件
    • US20090121281A1
    • 2009-05-14
    • US12270170
    • 2008-11-13
    • Keita TAKAHASHI
    • Keita TAKAHASHI
    • H01L29/792
    • H01L27/0203G11C7/02G11C16/0491G11C16/24G11C16/3427H01L27/105H01L27/115H01L27/11568H01L27/11573
    • A semiconductor memory device has an element isolation region between rewrite units of memory cells. A plurality of memory cells are memory cell groups arranged in a row direction, and each memory cell group consists of (8×N) memory cells arranged in a row direction as a unit to be used as a storage region. The number of a plurality of selection word lines is at least eight, and the number of selection transistors corresponding to at least N is connected to each of the plurality of selection word lines. At least one selection transistor in addition to (8×N) selection transistors are connected in total to the plurality of selection word lines. A plurality of main bit lines includes at least one main bit line in addition to (4×N) main bit lines connected to the common drain of a pair of selection transistors.
    • 半导体存储器件在存储器单元的重写单元之间具有元件隔离区域。 多个存储单元是沿行方向排列的存储单元组,并且每个存储单元组由以行方向排列的(8×N)个存储单元组成作为用作存储区域的单元。 多个选择字线的数量为至少8个,并且与至少N对应的选择晶体管的数量连接到多个选择字线中的每一个。 除了(8×N)个选择晶体管之外,至少一个选择晶体管总共连接到多个选择字线。 除了连接到一对选择晶体管的公共漏极的(4×N)个主位线之外,多个主位线还包括至少一个主位线。
    • 5. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD FOR THE SAME
    • 非线性半导体存储器件及其制造方法
    • US20080303078A1
    • 2008-12-11
    • US12020744
    • 2008-01-28
    • Keita TAKAHASHI
    • Keita TAKAHASHI
    • H01L29/78H01L21/336
    • H01L27/11565H01L27/11573
    • The fabrication method for a nonvolatile semiconductor memory device having a memory cell area including memory cells and a peripheral circuit area adjacent to the memory cell area and including peripheral transistors, the method including the steps of: (1) forming a first active region in the memory cell area and a second active region in the peripheral circuit area in a substrate by forming isolation insulating films in the memory cell area and the peripheral circuit area so as to be away from a boundary therebetween; (2) forming a bottom insulating film and an intermediate charge trap film sequentially over the entire surface of the substrate; (3) removing a portion of the intermediate charge trap film formed in the peripheral circuit area using a first mask film; (4) forming a gate insulating film in the peripheral circuit area and also at least part of a top insulating film in the memory cell area; (5) forming a gate electrode film on the top insulating film and the gate insulating film; and (6) forming gate electrodes of memory cells and peripheral transistors by patterning the gate electrode film. The step (3) includes a step of aligning an end of the first mask film with the boundary in the substrate.
    • 一种具有包括存储单元的存储单元区域和与存储单元区域相邻并包括外围晶体管的外围电路区域的非易失性半导体存储器件的制造方法,该方法包括以下步骤:(1)形成第 存储单元区域和第二有源区域,通过在存储单元区域和外围电路区域中形成隔离绝缘膜以远离其间的边界; (2)在基板的整个表面上依次形成底部绝缘膜和中间电荷捕获膜; (3)使用第一掩模膜去除在外围电路区域中形成的中间电荷捕获膜的一部分; (4)在外围电路区域中形成栅极绝缘膜,并且在存储单元区域中形成顶部绝缘膜的至少一部分; (5)在顶部绝缘膜和栅极绝缘膜上形成栅电极膜; 以及(6)通过对栅极电极膜进行构图来形成存储器单元和外围晶体管的栅电极。 步骤(3)包括将第一掩模膜的端部与衬底中的边界对准的步骤。
    • 7. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
    • 非易失性半导体存储器件及其驱动方法
    • US20120044760A1
    • 2012-02-23
    • US13169803
    • 2011-06-27
    • Keita TAKAHASHI
    • Keita TAKAHASHI
    • G11C11/34H01L29/792
    • G11C16/0466G11C16/0475G11C16/0491G11C16/08G11C16/3427
    • A nonvolatile semiconductor memory device has a first select transistor having a gate electrode connected to a first select word line, a source connected to a first sub bit line, and a drain connected to a first main bit line, and a second select transistor having a gate electrode connected to a second select word line, a source connected to a second sub bit line, and a drain connected to a second main bit line. The first sub bit lines are controlled by the first select transistor so as to be electrically isolated from each other between memory cell groups each formed by the memory cells to be erased simultaneously. On the other hand, the second sub bit lines are connected in common to the memory cells of memory cell groups to be erased separately, by the second select transistor.
    • 非易失性半导体存储器件具有第一选择晶体管,其具有连接到第一选择字线的栅电极,连接到第一子位线的源极和连接到第一主位线的漏极,以及具有第一选择晶体管的第二选择晶体管, 连接到第二选择字线的栅电极,连接到第二子位线的源极和连接到第二主位线的漏极。 第一子位线由第一选择晶体管控制,以在由要同时擦除的存储单元形成的存储单元组之间彼此电隔离。 另一方面,第二子位线通过第二选择晶体管共同连接到要被单独擦除的存储单元组的存储单元。
    • 10. 发明申请
    • DIGITAL CAMERA
    • 数码相机
    • US20110228156A1
    • 2011-09-22
    • US13151595
    • 2011-06-02
    • Keita TAKAHASHI
    • Keita TAKAHASHI
    • H04N5/225
    • G03B17/02H04N5/2251H04N5/2252H04N2101/00
    • A digital camera of the present invention has: a lens group reflecting photographic object light entering along a first optical axis to a second optical axis direction perpendicular to the first optical axis and forming an image of light flux thereof on an image pickup device located on the second optical axis; and a driving force generating member blocking or allowing entering light flux along the first optical axis by driving a barrier member, and has a camera body having an optical housing, a containing portion containing the optical housing and the barrier member, and having a transmitting member transmitting driving force of the driving force generating member to the barrier member, wherein the coupling relation between the driving force generating member and the driving force transmitting member is maintained.
    • 本发明的数码相机具有:透镜组,反射沿着第一光轴入射到与第一光轴垂直的第二光轴方向的摄影物体的光,并将其光束的图像形成在位于 第二光轴; 以及通过驱动阻挡构件阻挡或允许沿着第一光轴进入光通量的驱动力产生构件,并且具有具有光学壳体的照相机主体,容纳光学壳体和阻挡构件的容纳部分,并且具有发射构件 将驱动力产生构件的驱动力传递到阻挡构件,其中维持驱动力产生构件和驱动力传递构件之间的联接关系。