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1. 发明申请

US20090087991A1 Manufacturing method, manufacturing apparatus, control program and program recording medium of semicontructor device 审中-公开
标题翻译：半导体装置的制造方法，制造装置，控制程序和程序记录介质
公开(公告)号：US20090087991A1
公开(公告)日：2009-04-02
申请号：US12284750
申请日：2008-09-24
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/3105
CPC分类号： H01L21/32139 , H01L21/0337
摘要： A manufacturing method of a semiconductor device, which etches a layer to be etched on a substrate into a predetermined pattern based on a first pattern of photoresist produced by exposing and developing a photoresist film, the manufacturing method includes the steps of, patterning an organic membrane based on a first pattern of the photoresist, forming an SiO2 film on the patterned organic membrane, etching the SiO2 film so that the SiO2 remains only in a side wall section of the organic membrane and forming a second pattern of the SiO2 film by removing the organic membrane.
摘要翻译：一种半导体器件的制造方法，其基于通过曝光和显影光致抗蚀剂膜产生的光致抗蚀剂的第一图案将基板上待刻蚀的层蚀刻成预定图案，所述制造方法包括以下步骤：将有机膜图案化基于光致抗蚀剂的第一图案，在图案化有机膜上形成SiO 2膜，蚀刻SiO 2膜，使得SiO 2仅保留在有机膜的侧壁部分中，并通过除去SiO 2膜形成第二图案有机膜。

2. 发明授权

US07871908B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07871908B2
公开(公告)日：2011-01-18
申请号：US12407854
申请日：2009-03-20
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/425
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338 , H01L21/31138 , H01L21/76811 , H01L21/76813 , H01L21/76816 , Y10S438/948 , Y10S438/975
摘要： The method of manufacturing a semiconductor device comprising: forming a first hard mask layer and a second hard mask layer on the layer to be etched (S11); a first groove-forming mask pattern forming process for forming a groove-forming mask pattern which has a first pitch, is formed of the second hard mask layer, and is used as an etching mask when forming groove patterns(S12-S14); and a first concave portion-forming mask pattern forming process for etching the first hard mask layer using the second resist pattern as an etching mask, wherein the second resist pattern is formed of the second resist layer having an opening portion that has a fourth pitch and the first organic layer having an opening portion that is connected to an opening portion of the second resist layer and has a smaller size than the opening portion of the second resist layer (S15-S18).
摘要翻译：制造半导体器件的方法包括：在被蚀刻层上形成第一硬掩模层和第二硬掩模层（S11）; 用于形成具有第一间距的沟槽形成掩模图案的第一凹槽形成掩模图案形成工艺由第二硬掩模层形成，并且在形成凹槽图案时用作蚀刻掩模（S12-S14）。以及使用第二抗蚀剂图案作为蚀刻掩模来蚀刻第一硬掩模层的第一凹部形成掩模图案形成工艺，其中第二抗蚀剂图案由具有第四间距的开口部分的第二抗蚀剂层形成，以及所述第一有机层具有与所述第二抗蚀剂层的开口部连接并且具有比所述第二抗蚀剂层的开口部小的尺寸的开口部（S15-S18）。

3. 发明授权

US08114781B2 Substrate processing method and substrate processing apparatus 有权
标题翻译：基板处理方法和基板处理装置
公开(公告)号：US08114781B2
公开(公告)日：2012-02-14
申请号：US11769147
申请日：2007-06-27
申请人： Eiichi Nishimura , Koichi Yatsuda
发明人： Eiichi Nishimura , Koichi Yatsuda
IPC分类号： H01L21/302
CPC分类号： H01L21/31116 , H01L21/67207
摘要： A substrate processing method capable of selectively removing a nitride film. Oxygen plasma containing plasmarized oxygen gas is made to be in contact with a silicon nitride film, which is made of SiN, of a wafer to thereby cause the silicon nitride film to be changed to a silicon monoxide film. The silicon monoxide film is selectively etched by hydrofluoric acid generated from HF gas supplied toward the silicon monoxide film.
摘要翻译：能够选择性地去除氮化物膜的基板处理方法。将含有等离子体氧气的氧等离子体与由SiN制成的氮化硅膜接触，从而使氮化硅膜变为一氧化硅膜。由向一氧化硅膜供给的HF气体产生的氢氟酸选择性地蚀刻一氧化硅膜。

4. 发明申请

US20110104901A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：US20110104901A1
公开(公告)日：2011-05-05
申请号：US12997584
申请日：2009-02-26
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/302
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/76816 , H01L27/11521
摘要： A semiconductor device manufacturing method includes a process of forming a first organic film pattern on a to-be-etched layer on a substrate, a process of forming a silicon oxide film coating the first organic film pattern in an isotropic manner, a process of etching the silicon oxide film to form a first mask pattern in such a manner to cause the width of the line part of the first organic film pattern to have a fixed proportion with respect to a thickness of the silicon oxide film that coats a surface of the line part in the isotropic manner, a process of forming a second organic film pattern coating the silicon oxide film, a process of forming a second mask pattern that includes the silicon oxide film on a side face part in an area that is coated by the second organic film pattern, and a process of, in an area other than the area that is coated by the second organic film pattern, forming a third mask pattern in which an even number of the silicon oxide films are arranged.
摘要翻译：半导体器件制造方法包括在基板上的被蚀刻层上形成第一有机膜图案的工序，以各向同性方式形成涂布第一有机膜图案的氧化硅膜的工序，蚀刻工序所述氧化硅膜以这样的方式形成第一掩模图案，以使得所述第一有机膜图案的线部分的宽度相对于所述线的表面涂覆的所述氧化硅膜的厚度具有固定的比例部分以各向同性方式，形成涂覆氧化硅膜的第二有机膜图案的工艺，在由第二有机层涂覆的区域中的侧面部分上形成包括氧化硅膜的第二掩模图案的工艺膜图案，以及在由第二有机膜图案涂覆的区域以外的区域中形成其中布置有偶数个氧化硅膜的第三掩模图案的工艺。

5. 发明申请

US20090291560A1 FORMING METHOD OF ETCHING MASK, CONTROL PROGRAM AND PROGRAM STORAGE MEDIUM 有权
标题翻译：蚀刻掩模，控制程序和程序存储介质的形成方法
公开(公告)号：US20090291560A1
公开(公告)日：2009-11-26
申请号：US12441823
申请日：2008-10-23
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/306
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L22/14 , H01L2924/0002 , H01L2924/00
摘要： A feedforward control is performed so that a line width of a mask constituted by an Si3N4 layer 102 formed by using a photoresist 105b as a mask is to be the same as a line width of a mask pattern constituted by an SiO2 layer 103 based on a measured line width of the photoresist 105b and the measured line width of the mask pattern constituted by the SiO2 layer 103. For example, a control of a trimming amount of the line width of the photoresist 105b is performed so that the line width of the photoresist 105b is to be the same as the line width of the mask pattern constituted by the SiO2 layer 103.
摘要翻译：执行前馈控制，使得由通过使用光致抗蚀剂105b作为掩模形成的由Si 3 N 4层102构成的掩模的线宽度将与由基于SiO 2的SiO 2层103构成的掩模图案的线宽相同测量光致抗蚀剂105b的线宽以及由SiO 2层103构成的掩模图案的测量线宽。例如，对光致抗蚀剂105b的线宽进行修整量的控制，使得光致抗蚀剂的线宽 105b与由SiO 2层103构成的掩模图案的线宽相同。

6. 发明授权

US08198183B2 Forming method of etching mask, control program and program storage medium 有权
标题翻译：蚀刻掩模，控制程序和程序存储介质的形成方法
公开(公告)号：US08198183B2
公开(公告)日：2012-06-12
申请号：US12441823
申请日：2008-10-23
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/38 , H01L21/4763
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L22/14 , H01L2924/0002 , H01L2924/00
摘要： A feedforward control is performed so that a line width of a mask constituted by an Si3N4 layer 102 formed by using a photoresist 105b as a mask is to be the same as a line width of a mask pattern constituted by an SiO2 layer 103 based on a measured line width of the photoresist 105b and the measured line width of the mask pattern constituted by the SiO2 layer 103. For example, a control of a trimming amount of the line width of the photoresist 105b is performed so that the line width of the photoresist 105b is to be the same as the line width of the mask pattern constituted by the SiO2 layer 103.
摘要翻译：执行前馈控制，使得由通过使用光致抗蚀剂105b作为掩模形成的由Si 3 N 4层102构成的掩模的线宽度将与由基于SiO 2的SiO 2层103构成的掩模图案的线宽相同测量光致抗蚀剂105b的线宽以及由SiO 2层103构成的掩模图案的测量线宽。例如，对光致抗蚀剂105b的线宽进行修整量的控制，使得光致抗蚀剂的线宽 105b与由SiO 2层103构成的掩模图案的线宽相同。

7. 发明申请

US20090087990A1 Manufacturing method, manufacturing apparatus, control program and program recording medium of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法，制造装置，控制程序和程序记录介质
公开(公告)号：US20090087990A1
公开(公告)日：2009-04-02
申请号：US12284749
申请日：2008-09-24
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/311
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： A manufacturing method of a semiconductor device, which etches a layer to be etched on a substrate into a predetermined pattern based on a first pattern of photoresist produced by exposing and developing a photoresist film, the manufacturing method including the steps of forming an SiO2 film on a first pattern of the photoresist, etching the SiO2 film so that the SiO2 may remain only in a side wall section of a first pattern of the photoresist, removing a first pattern of the photoresist, and forming a second pattern of the SiO2 film.
摘要翻译：一种半导体器件的制造方法，其基于通过曝光和显影光致抗蚀剂膜产生的光致抗蚀剂的第一图案将基板上待蚀刻的层蚀刻成预定图案，所述制造方法包括以下步骤：在光刻胶的第一图案，蚀刻SiO 2膜，使SiO 2仅保留在光致抗蚀剂的第一图案的侧壁部分中，去除光致抗蚀剂的第一图案，并形成SiO 2膜的第二图案。

8. 发明申请

US20090081565A1 METHOD FOR FORMING ETCHING MASK, CONTROL PROGRAM AND PROGRAM STORAGE MEDIUM 审中-公开
标题翻译：形成蚀刻掩模的方法，控制程序和程序存储介质
公开(公告)号：US20090081565A1
公开(公告)日：2009-03-26
申请号：US12234032
申请日：2008-09-19
申请人： Koichi Yatsuda , Eiichi Nishimura
发明人： Koichi Yatsuda , Eiichi Nishimura
IPC分类号： H01L21/02 , G03F1/00
CPC分类号： H01L21/32139
摘要： Disclosed is a method for forming an etching mask, capable of precisely and easily forming an etching mask having a microscopic pattern of a non-straight-line shape. An exposure pattern of a straight-line shape is transferred to a photoresist by using a first reticle and developed, and after a trimming process, a SiO2 layer is etched by using it as a mask. Thereafter, an exposure pattern of a straight-line shape is transferred to a photoresist by using a second reticle and developed, and then, a protruding amount of an end portion of the photoresist protruding from the SiO2 layer is measured. Subsequently, the pattern of the photoresist is trimmed to have a preset thickness and length, and by forming the protruding amount to have a preset amount or less, and by using this as a mask, a Si3N4 layer is etched, thereby forming an etching mask having an approximately L-shape.
摘要翻译：公开了一种形成蚀刻掩模的方法，其能够精确且容易地形成具有非直线形状的微观图案的蚀刻掩模。通过使用第一掩模版将直线形状的曝光图案转印到光致抗蚀剂中并显影，并且在修整工艺之后，通过使用其作为掩模来蚀刻SiO 2层。此后，通过使用第二掩模版将直线形状的曝光图案转印到光致抗蚀剂并显影，然后测量从SiO 2层突出的光致抗蚀剂的端部的突出量。随后，将光致抗蚀剂的图案修剪成具有预设的厚度和长度，并且通过将突出量形成为预定量或更小的量，并且通过将其用作掩模，蚀刻Si 3 N 4层，从而形成蚀刻掩模具有大致L形。

9. 发明授权

US08741396B2 Method for forming amorphous carbon nitride film, amorphous carbon nitride film, multilayer resist film, method for manufacturing semiconductor device, and storage medium in which control program is stored 失效
标题翻译：无定形碳氮化物膜的形成方法，无定形氮化碳膜，多层抗蚀剂膜，半导体装置的制造方法以及存储控制程序的存储介质
公开(公告)号：US08741396B2
公开(公告)日：2014-06-03
申请号：US13060821
申请日：2009-06-30
申请人： Hiraku Ishikawa , Eiichi Nishimura
发明人： Hiraku Ishikawa , Eiichi Nishimura
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , C23C16/347 , C23C16/5096 , G03F7/091 , H01L21/02115 , H01L21/02274 , H01L21/3146 , H01L21/318
摘要： An amorphous carbon film, which has excellent etching resistance and is capable of reducing reflectance when a resist film is exposed to light, is form. A method for manufacturing a semiconductor device includes forming an object film to be etched on a wafer, supplying a process gas containing a CO gas and an N2 gas into a processing container, forming an amorphous carbon nitride film from the supplied CO gas and N2 gas, forming a silicon oxide film on the amorphous carbon nitride film, forming an ArF resist film on the silicon oxide film, patterning the ArF resist film, etching the silicon oxide film by using the ArF resist film as a mask, etching the amorphous carbon nitride film by using the silicon oxide film as a mask, and etching the object film to be etched by using the amorphous carbon nitride film as a mask.
摘要翻译：形成了具有优异的耐蚀刻性并且当抗蚀剂膜暴露于光时能够降低反射率的无定形碳膜。一种制造半导体器件的方法包括在晶片上形成待蚀刻的目标薄膜，将含有CO气体和N 2气体的工艺气体供给到处理容器中，从供给的CO气体和N 2气体形成无定形氮化碳膜在无定形氮化碳膜上形成氧化硅膜，在氧化硅膜上形成ArF抗蚀剂膜，对ArF抗蚀剂膜进行构图，使用ArF抗蚀剂膜作为掩模蚀刻氧化硅膜，蚀刻无定形碳氮化物通过使用氧化硅膜作为掩模，并且通过使用无定形氮化碳膜作为掩模来蚀刻待蚀刻的目标膜。

10. 发明授权

US08530354B2 Substrate processing method 有权
标题翻译：基板加工方法
公开(公告)号：US08530354B2
公开(公告)日：2013-09-10
申请号：US13415363
申请日：2012-03-08
申请人： Masato Kushibiki , Eiichi Nishimura
发明人： Masato Kushibiki , Eiichi Nishimura
IPC分类号： H01L21/311
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/31116 , H01L21/31122 , H01L21/31138 , H01L21/31144 , H01L21/32136
摘要： The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer which are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.
摘要翻译：本发明提供一种基板处理方法，用于处理至少包括依次堆叠的处理层，中间层和掩模层的基板。掩模层包括被配置为暴露中间层的一部分的孔。基板处理方法包括：材料沉积步骤，其在所述孔的侧表面上沉积材料，并且通过用沉积气体产生的等离子体蚀刻所述中间层的暴露部分来暴露所述处理层的一部分;以及蚀刻步骤蚀刻处理层的暴露部分。

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