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1. 发明授权

US4811075A High voltage MOS transistors 失效
标题翻译：高压MOS晶体管
公开(公告)号：US4811075A
公开(公告)日：1989-03-07
申请号：US041994
申请日：1987-04-24
申请人： Klas H. Eklund
发明人： Klas H. Eklund
IPC分类号： H01L27/085 , H01L27/092 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/78 , H01L27/02 , H01L29/80
CPC分类号： H01L29/1087 , H01L27/085 , H01L27/0925 , H01L29/0634 , H01L29/0847 , H01L29/7835 , H01L29/1045 , H01L29/105 , H01L29/7832
摘要： An insulated-gate, field-effect transistor and a double-sided, junction-gate field-effect transistor are connected in series on the same chip to form a high-voltage MOS transistor. An extended drain region is formed on top of a substrate of opposite conductivity-type material. A top layer of material having a conductivity-type opposite that of the extended drain and similar to that of the substrate is provided by ion-implantation through the same mask window as the extended drain region. This top layer covers only an intermediate portion of the extended drain which has ends contacting a silicon dioxide layer thereabove. The top layer is either connected to the substrate or left floating. Current flow through the extended drain region can be controlled by the substrate and the top layer, which act as gates providing field-effects for pinching off the extended drain region therebetween. A complementary pair of such high-voltage MOS transistors having opposite conductivity-type are provided on the same chip.

2. 发明授权

US5313082A High voltage MOS transistor with a low on-resistance 失效
标题翻译：具有低导通电阻的高压MOS晶体管
公开(公告)号：US5313082A
公开(公告)日：1994-05-17
申请号：US18080
申请日：1993-02-16
申请人： Klas H. Eklund
发明人： Klas H. Eklund
IPC分类号： H01L27/02 , H01L21/337 , H01L21/8232 , H01L21/8234 , H01L27/06 , H01L27/085 , H01L27/088 , H01L27/095 , H01L29/06 , H01L29/08 , H01L29/78 , H01L29/808 , H01L29/784
CPC分类号： H01L27/085 , H01L29/0634 , H01L29/0847 , H01L29/7835 , H01L29/7832
摘要： An embodiment of the present invention is an improved insulated-gate, field-effect transistor and a three-sided, junction-gate field-effect transistor connected in series on the same chip to form a high-voltage MOS transistor. An extended drain region is formed on top of a substrate of opposite conductivity material. A layer of material with a conductivity opposite to that of the material of the extended drain region is buried within the extended drain region such that field-effect pinch-off depletion zones extend both above and below the buried layer. A top layer of material similar to the substrate is formed by ion implantation through the same mask window as the extended drain region. The top layer covers the buried layer and extended drain region and itself is covered by a silicon dioxide layer above. Current flow through the extended drain is controlled by the substrate and buried layer when a voltage is applied to pinch-off the extended drain between them in a familiar field-effect fashion.
摘要翻译：本发明的一个实施例是一种改进的绝缘栅，场效应晶体管和串联在同一芯片上的三边形结栅场效应晶体管，以形成高压MOS晶体管。延伸的漏极区域形成在相对导电材料的衬底的顶部上。具有导电性与延伸漏极区的材料导电性相反的材料层被掩埋在延伸的漏极区内，使得场效应夹断耗尽区在掩埋层的上方和下方延伸。通过与延伸的漏极区域相同的掩模窗口的离子注入形成与衬底类似的顶层材料。顶层覆盖掩埋层和延伸的漏极区，并且其上面被二氧化硅层覆盖。通过延伸漏极的电流通过衬底和掩埋层进行控制，当施加电压以熟悉的场效应方式将它们之间的扩展漏极夹紧时。

3. 发明授权

US5146298A Device which functions as a lateral double-diffused insulated gate field effect transistor or as a bipolar transistor 失效
标题翻译：用作横向双扩散绝缘栅场效应晶体管或双极晶体管的器件
公开(公告)号：US5146298A
公开(公告)日：1992-09-08
申请号：US747657
申请日：1991-08-16
申请人： Klas H. Eklund
发明人： Klas H. Eklund
IPC分类号： H01L29/06 , H01L29/08 , H01L29/73 , H01L29/735 , H01L29/78
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0821 , H01L29/0878 , H01L29/7302 , H01L29/735 , H01L29/7817 , H01L29/7832
摘要： An insulated gate field effect transistor with an extended drain region is presented. The extended drain region includes a single-sided JFET and a double-sided JFET connected in parallel. The insulated gate field effect transistor is built on a substrate of first conductivity type. A pocket of semiconductor material of second conductivity type is within the substrate adjoining a surface of the substrate. A body region of semiconductor material of the first conductivity type is within the pocket adjoining the surface of the substrate. Also, a source region of semiconductor material of the second conductivity type is within the body region adjoining the surface of the substrate. A drain contact region of semiconductor material of the second conductivity type is also within the pocket of semiconductor material adjoining the surface of the substrate. A first intermediate region of semiconductor material of the first conductivity type is within the pocket of semiconductor material between the body region and the drain contact region. The first intermediate region adjoins the surface of the substrate. Also, a second intermediate region of semiconductor material of second conductivity type is within the pocket of semiconductor material between the body region and the drain contact region. The second intermediate region also adjoins the surface of the substrate. A portion of the second intermediate region extends between the first intermediate region and the surface of the substrate.
摘要翻译：提出了具有延伸漏极区域的绝缘栅场效应晶体管。延伸的漏极区域包括并联连接的单面JFET和双面JFET。绝缘栅场效应晶体管构建在第一导电类型的衬底上。第二导电类型的半导体材料的袋子在与衬底的表面相邻的衬底内。第一导电类型的半导体材料的主体区域在与基板的表面相邻的凹槽内。此外，第二导电类型的半导体材料的源极区域在与衬底的表面相邻的体区内。第二导电类型的半导体材料的漏极接触区域也在与衬底表面相邻的半导体材料的凹槽内。第一导电类型的半导体材料的第一中间区域位于体区域和漏极接触区域之间的半导体材料的凹穴内。第一中间区域与衬底的表面相邻。此外，第二导电类型的半导体材料的第二中间区域位于体区域和漏极接触区域之间的半导体材料的凹穴内。第二中间区域也与基板的表面相邻。第二中间区域的一部分在第一中间区域和衬底的表面之间延伸。

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