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    • 1. 发明授权
    • PLL circuit
    • PLL电路
    • US08213560B2
    • 2012-07-03
    • US12382387
    • 2009-03-16
    • Kiyoshi MiuraMichiko Miura, legal representative
    • Kiyoshi Miura
    • H03D3/24
    • H03L7/183H03L7/0896H03L7/0898H03L7/093
    • Disclosed herein is a phase-locked loop circuit including: a voltage controlled oscillator; a variable frequency divider circuit for frequency-dividing an oscillating signal of the voltage controlled oscillator into a 1/N (N is an integer) frequency; a phase comparator circuit for comparing phases of a frequency-divided signal and a reference signal of a reference frequency with each other; a charge pump circuit for outputting a charge pump current changed in pulse width; a loop filter for being supplied with the charge pump current and outputting a direct-current voltage changed in level; and a control circuit for calculating a value of the charge pump current as a function of the oscillating frequency of the voltage controlled oscillator and a coefficient for setting a phase locked loop band, and setting the value of the charge pump current in the charge pump circuit.
    • 本文公开了一种锁相环电路,包括:压控振荡器; 用于将压控振荡器的振荡信号分频为1 / N(N是整数)频率的可变分频器电路; 相位比较器电路,用于比较分频信号和参考频率的参考信号的相位; 用于输出脉冲宽度变化的电荷泵电流的电荷泵电路; 用于提供电荷泵电流并输出电平变化的直流电压的环路滤波器; 以及控制电路,用于计算作为压控振荡器的振荡频率的函数的电荷泵电流的值和用于设定锁相环带的系数,并且设定电荷泵电路中的电荷泵电流的值 。
    • 4. 发明授权
    • Electronic apparatus, dispersion adjustment method of IC internal component section of electronic apparatus and IC
    • 电子设备,电子设备和IC的IC内部部件的分散调整方法
    • US08121578B2
    • 2012-02-21
    • US12407319
    • 2009-03-19
    • Takahiro OkadaKiyoshi MiuraMichiko Miura, legal representativeNaruhiro Yoshida
    • Takahiro OkadaKiyoshi MiuraNaruhiro Yoshida
    • H04B1/28
    • H03J1/0008H03J2200/04H04B17/21
    • An electronic apparatus includes: a first integrated circuit including an internal component section, a nonvolatile memory, and an interface section; a test signal generation section configured to generate a test signal to be supplied to the first integrated circuit; a second integrated circuit including a processing section configured to process an output signal of the first integrated circuit, a signal processor to which the interface section of the first integrated circuit is connected and a detection section configured to detect decision information for deciding a result of the process of the test signal carried out by the processing section; and a control section configured to supply the test signal from the test signal generation section in place of the input signal to the first integrated circuit and issuing an instruction to the signal processor of the second integrated circuit to produce actual use adjustment data.
    • 电子设备包括:第一集成电路,包括内部组件部分,非易失性存储器和接口部分; 测试信号生成部,被配置为生成要提供给所述第一集成电路的测试信号; 第二集成电路,包括处理部件,被配置为处理第一集成电路的输出信号;第一集成电路的接口部分被连接到的信号处理器;以及检测部件,被配置为检测用于决定第一集成电路的结果的判定信息 由处理部分执行的测试信号的处理; 以及控制部,被配置为将来自所述测试信号生成部的测试信号代替所述输入信号提供给所述第一集成电路,并向第二集成电路的信号处理器发出指令以产生实际使用调整数据。
    • 6. 发明授权
    • Method of manufacturing fluorescent screens
    • 制造荧光屏的方法
    • US4572880A
    • 1986-02-25
    • US254308
    • 1981-04-15
    • Kiyoshi Miura
    • Kiyoshi Miura
    • H01J9/227H01J29/28G03C5/00
    • H01J29/28H01J9/2278
    • A fluorescent screen of a black matrix type color picture tube is manufactured by forming a graphite film on an inner surface of a face plate, applying a photoresist film on the graphite film, exposing to light portions of the photoresist film where phosphor picture elements are to be formed subsequently, removing the exposed portions of the photoresist film to expose portions of the graphite film, removing the exposed portions of the graphite film to form a black matrix film having voids corresponding to the exposed portions of the graphite film, and thereafter depositing triads of phosphors of picture elements on the inner surface of the face plate through the voids. In a modification, a reflective film is interposed between the graphite film and the photoresist film and portions of the reflective film in register with portions of the photoresist film exposed to light are removed by etching.
    • 通过在面板的内表面上形成石墨膜,在石墨膜上涂布光致抗蚀剂膜,暴露于磷光体像素的光致抗蚀剂膜的光部分而制造黑色矩阵型彩色显像管的荧光屏 随后形成光刻胶膜的露出部分,露出部分石墨膜,除去石墨膜的暴露部分,形成具有与石墨膜暴露部分相对应的空隙的黑色矩阵膜,然后沉积三元组 的荧光体通过空隙在面板的内表面上的图像元素。 在变形例中,在石墨膜和光致抗蚀剂膜之间插入反射膜,并通过蚀刻去除与曝光的光致抗蚀剂膜的部分对准的反射膜的部分。
    • 10. 发明授权
    • Clock generating apparatus
    • 时钟发生装置
    • US06407606B1
    • 2002-06-18
    • US09714538
    • 2000-11-17
    • Kiyoshi Miura
    • Kiyoshi Miura
    • H03H1116
    • G06F1/06
    • A clock forming unit, a selection processing unit, and a dithering control unit are provided. In the clock forming unit, m-phase clock signals whose phases are mutually deviated by a predetermined amount at a desired frequency are formed. The clock signals formed in the clock forming unit are supplied to the selection processing unit. A control signal is supplied from the dithering control unit to the selection processing unit. In the selection processing unit, by sequentially selecting one of the m-phase clock signals in response to the control signal from the dithering control unit, the phase is fluctuated forward and backward with a predetermined relation within a range of a precision that is permitted by a communication system serving as a supplying destination. A second clock signal in which a peak on a spectrum is spread is obtained from the selection processing unit.
    • 提供时钟形成单元,选择处理单元和抖动控制单元。 在时钟形成单元中,形成相位以期望频率相互偏离预定量的m相时钟信号。 形成在时钟形成单元中的时钟信号被提供给选择处理单元。 控制信号从抖动控制单元提供给选择处理单元。 在选择处理单元中,通过响应于来自抖动控制单元的控制信号顺次选择m相时钟信号之一,该相位在预定关系范围内向前和向后波动,精度在 作为供给目的地的通信系统。 从选择处理单元获得其中频谱上的峰值扩展的第二时钟信号。