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1. 发明授权

US07254160B2 Radio receiver 失效
标题翻译：无线电接收机
公开(公告)号：US07254160B2
公开(公告)日：2007-08-07
申请号：US10366492
申请日：2003-02-12
申请人： Kiyoshi Kawamoto , Manabu Kawabe , Shiro Mazawa , Tomoyuki Ono
发明人： Kiyoshi Kawamoto , Manabu Kawabe , Shiro Mazawa , Tomoyuki Ono
IPC分类号： H04B1/707
CPC分类号： H04J13/18 , H04B1/707 , H04B2001/70935 , H04B2201/70707 , H04J13/0048
摘要： A radio receiver handles a transmitted Walsh sequence having a code length of “m” as a two-dimensional array of “a” rows and “b” columns, and performs a fast Hadamard transform process having a code length of “a” in the row direction. The absolute values of the results are added in the column direction, and a Walsh number having the maximum receiving power is selected to determine a Walsh sequence having a code length of “a.” Then, only the identified column is extracted, and a fast Hadamard transform process having a code length of “b” is applied in the column direction.
摘要翻译：无线电接收器处理具有代码长度“m”的发送沃尔什序列作为“a”行和“b”列的二维数组，并且执行代码长度为“a”的快速哈达玛变换处理行方向。结果的绝对值在列方向上相加，并且选择具有最大接收功率的沃尔什号以确定码长为“a”的沃尔什序列。然后，仅提取所识别的列，并且在列方向上应用代码长度为“b”的快速哈达玛变换处理。

2. 发明申请

US20070261631A1 Method for Growing Epitaxial Crystal 有权
标题翻译：生长外延晶体的方法
公开(公告)号：US20070261631A1
公开(公告)日：2007-11-15
申请号：US11661696
申请日：2005-06-06
申请人： Manabu Kawabe , Ryuichi Hirano
发明人： Manabu Kawabe , Ryuichi Hirano
IPC分类号： C30B28/00
CPC分类号： C30B25/20 , C30B25/16 , C30B29/40 , H01L21/02392 , H01L21/02433 , H01L21/02543 , H01L21/02576
摘要： It is to provide a method for growing an epitaxial crystal in which the doping conditions are set when an epitaxial crystal having a desired carrier concentration is grown. A method for growing an epitaxial crystal while a dopant is added to a compound semiconductor substrate, comprises: obtaining a relation between an off angle and a doping efficiency with regards to the same type of compound semiconductor substrate in advance; and setting a doping condition for carrying out an epitaxial growth on the compound semiconductor substrate based on the obtained relation and a value of the off angle of the substrate.
摘要翻译：提供一种生长外延晶体的方法，其中当生长具有所需载流子浓度的外延晶体时，其中设置掺杂条件。一种将掺杂剂添加到化合物半导体衬底中的生长外延晶体的方法包括：预先获得关于相同类型的化合物半导体衬底的偏角和掺杂效率之间的关系; 以及基于获得的关系和基板的偏离角的值，在化合物半导体基板上设定用于进行外延生长的掺杂条件。

3. 发明申请

US20070163504A1 Vapor phase growth apparatus 失效
标题翻译：气相生长装置
公开(公告)号：US20070163504A1
公开(公告)日：2007-07-19
申请号：US10589348
申请日：2005-02-15
申请人： Eiichi Shimizu , Nobuhito Makino , Manabu Kawabe
发明人： Eiichi Shimizu , Nobuhito Makino , Manabu Kawabe
IPC分类号： C23C16/00
CPC分类号： C30B25/10 , C23C16/4583
摘要： It is to provide a vapor phase growth apparatus which can perform vapor phase growth of a thin film having a good uniformity throughout a surface of a wafer. The vapor phase growth apparatus includes at least a sealable reactor, a wafer containing member (wafer holder) installed within the reactor and having a wafer mounting portion (pocket hole) on a surface thereof for holding a wafer, a gas supply member (gas inlet pipe) for supplying raw material gas towards the wafer, a heating member (heater) for heating the wafer, and a heat uniformizing member (susceptor) for holding the wafer containing member and uniformizing heat from the heating member, wherein raw material gas is supplied into the reactor in a high temperature environment while heating the wafer by using the heating member via the heat uniformizing member and the wafer containing member, to form a film grown on a surface of the wafer, and wherein a recess portion depressed in a dome shape is formed at a back side of the wafer containing member.
摘要翻译：本发明提供一种气相生长装置，其能够在整个晶片的表面上实现均匀性均匀的薄膜的气相生长。气相生长装置至少包括可密封的反应器，安装在反应器内的晶片容纳构件（晶片保持器），并且在其表面上具有用于保持晶片的晶片安装部分（凹穴），气体供给构件用于向晶片供应原料气体的加热构件（加热器），用于保持晶片容纳构件的热均匀化构件（基座），并且来自加热构件的均匀化热量，其中提供原料气体在高温环境下进入反应器，同时通过使用加热构件经由热均匀化构件和晶片容纳构件加热晶片，以形成在晶片的表面上生长的膜，并且其中凹陷的圆顶形状的凹部形成在晶片容纳构件的背面。

4. 发明申请

US20060052094A1 Software-defined radio apparatus 失效
标题翻译：软件定义无线电设备
公开(公告)号：US20060052094A1
公开(公告)日：2006-03-09
申请号：US11218484
申请日：2005-09-06
申请人： Manabu Kawabe , Katsuhiko Tsunehara , Hirotake Ishii , Takashi Ishikawa
发明人： Manabu Kawabe , Katsuhiko Tsunehara , Hirotake Ishii , Takashi Ishikawa
IPC分类号： H04M3/00 , H04M1/00
CPC分类号： H04B1/0003 , H04B1/40
摘要： To simplify the configuration of functional modules in a software-defined radio apparatus, and facilitate the development of software. The functional modules have input and output terminals of a common configuration. Distributed timing control is performed so that the functional modules operate in their respective timings, and the functional modules have common input/output signals.
摘要翻译：为了简化软件定义的无线电设备中的功能模块的配置，并且便于开发软件。功能模块具有通用配置的输入和输出端子。执行分布式定时控制，使得功能模块在其各自的定时中操作，并且功能模块具有公共的输入/输出信号。

5. 发明授权

US5694429A Mobile radio communication system 失效
标题翻译：移动无线电通信系统
公开(公告)号：US5694429A
公开(公告)日：1997-12-02
申请号：US426253
申请日：1995-04-21
申请人： Kiyoki Sekine , Toshio Kato , Manabu Kawabe , Takuro Sato
发明人： Kiyoki Sekine , Toshio Kato , Manabu Kawabe , Takuro Sato
IPC分类号： H04B7/26 , G10L11/06 , G10L19/00 , H03M13/23 , H04J3/16 , H04L1/00 , H03M13/12 , H04J13/00
CPC分类号： H04L1/0042 , G10L19/012 , G10L25/93 , H03M13/23 , H04J3/1688 , H04L1/0054 , H04L1/0059 , Y02B60/50
摘要： In a mobile radio communication system, at a transmitter side, when a sound-absent section is detected in sound data, transmission of the sound data is stopped, and instead, tail bits are transmitted. A transmission power is lowered to 0 (zero) or a given value other than 0 when the transmission of the tail bits is finished. The lowering of the transmission power is held until a sound-present section is detected. Convolutional encoding is effected to the sound data and the tail bits prior to transmission. At a receiver side, the variation in transmission power is monitored to control an operation of an associated component in response to the monitored power variation. Viterbi decoding is effected for decoding the convolutional code.
摘要翻译：在移动无线电通信系统中，在发射机侧，当在声音数据中检测到声音缺失部分时，停止发送声音数据，而是发送尾部比特。当尾部位的传输结束时，传输功率降低到0（零）或除0之外的给定值。保持发送功率的降低，直到检测到声音发生部分。在传输之前对声音数据和尾部位进行卷积编码。在接收机侧，监测发射功率的变化以响应于所监测的功率变化来控制相关组件的操作。实现维特比解码以对卷积码进行解码。

6. 发明授权

US5463660A Block-spreading code-division multiple-access demodulator with improved interference cancellation 失效
标题翻译：具有改进的干扰消除的块扩展码分多址解调器
公开(公告)号：US5463660A
公开(公告)日：1995-10-31
申请号：US283172
申请日：1994-08-03
申请人： Atsushi Fukasawa , Manabu Kawabe , Akiyoshi Kawahashi , Takuro Sato
发明人： Atsushi Fukasawa , Manabu Kawabe , Akiyoshi Kawahashi , Takuro Sato
IPC分类号： H04J13/00 , H04B1/7107 , H04B1/69
CPC分类号： H04B1/71075
摘要： In a block-spreading code-division multiple-access communication system a demodulator stores received chip data in a separate memory area for each transmitting station. Each area has a capacity of at least two blocks. When a complete block is received from a transmitting station, all blocks of data stored in the corresponding memory area are correlated against a set of product codewords, which are obtained by spreading a set of orthogonal codewords by the transmitting station's spreading code, to find the codeword that gives the maximum correlation value. For the oldest block, this correlation value and information identifying the codeword are output. For all blocks, the maximum correlation value and corresponding product codeword are used to calculate interference correction data, which are subtracted from the data in other memory areas.
摘要翻译：在块扩展码分多址通信系统中，解调器将接收到的码片数据存储在每个发送站的单独的存储区域中。每个区域具有至少两个块的容量。当从发送站接收到完整的块时，存储在对应的存储区域中的所有数据块与通过发送站的扩展码扩展一组正交码字而获得的一组乘积码字相关，以找到给出最大相关值的码字。对于最旧的块，输出该相关值和识别码字的信息。对于所有块，使用最大相关值和相应的乘积码字来计算干扰校正数据，该数据从其他存储区域中的数据中减去。

7. 发明授权

US5394434A Code-division multiple-access demodulator with improved interference cancelation 失效
标题翻译：具有改进的干扰消除的码分多址解调器
公开(公告)号：US5394434A
公开(公告)日：1995-02-28
申请号：US141665
申请日：1993-10-26
申请人： Manabu Kawabe , Takuro Sato , Toshio Kato , Akiyoshi Kawahashi , Atsushi Fukasawa
发明人： Manabu Kawabe , Takuro Sato , Toshio Kato , Akiyoshi Kawahashi , Atsushi Fukasawa
IPC分类号： H04J13/00 , H04B1/7107 , H04K1/00
CPC分类号： H04B1/71075
摘要： A demodulator for code-division multiple-access spread-spectrum communications stores received chip data in a separate memory area for each transmitting station. Each area has a capacity of at least two symbols. When a complete symbol is received from a transmitting station, all chip data stored in the corresponding memory area are correlated with the corresponding spreading code, and estimated symbol values are derived from the correlated values. The correlated or estimated value of the oldest symbol is output as a demodulated value. The difference between each estimated symbol value and the previous estimate for the same symbol is multiplied by the spreading code to generate remaining interference values, which are subtracted from all chip data stored in memory areas for other transmitting stations, thereby updating those data.
摘要翻译：用于码分多址扩频通信的解调器将接收的码片数据存储在每个发射站的单独的存储区域中。每个区域具有至少两个符号的容量。当从发送站接收到完整的符号时，存储在对应的存储区域中的所有芯片数据与对应的扩展码相关，并且从相关值导出估计的符号值。输出最旧符号的相关或估计值作为解调值。将每个估计符号值和相同符号的先前估计之间的差乘以扩展码，以产生剩余干扰值，该剩余干扰值从存储在其他发射站的存储区域中的所有芯片数据中减去，从而更新这些数据。

8. 发明授权

US07683723B2 Phase locked loop circuits, offset PLL transmitters, radio frequency integrated circuits and mobile phone systems 有权
标题翻译：锁相环电路，偏移PLL发射机，射频集成电路和手机系统
公开(公告)号：US07683723B2
公开(公告)日：2010-03-23
申请号：US11865729
申请日：2007-10-02
申请人： Yukinori Akamine , Manabu Kawabe , Satoshi Tanaka , Yasuo Shima , Ryoichi Takano
发明人： Yukinori Akamine , Manabu Kawabe , Satoshi Tanaka , Yasuo Shima , Ryoichi Takano
IPC分类号： H03L7/07 , H03L7/085
CPC分类号： H03L7/0895 , H03C3/0933 , H03C3/0966 , H03C3/0983 , H03C3/0991 , H03L7/0898 , H03L7/107 , H03L7/185
摘要： A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
摘要翻译：配有环路增益检测电路的PLL电路，可以抑制环路增益的变化。当检测到环路增益时，首先改变相位检测器的第二输入（IN-2）的输入信号的频率，并且通过电压锁定振荡器的输出来检测对应于该变化的响应。通过将电压锁定振荡器的输出与计数器连接并将计数器的输出与积分器连接来进行检测。通过对电荷泵电流值的检测结果执行反馈来优化锁相环特性。

9. 发明授权

US07670434B2 Vapor phase growth apparatus 失效
标题翻译：气相生长装置
公开(公告)号：US07670434B2
公开(公告)日：2010-03-02
申请号：US10589348
申请日：2005-02-15
申请人： Eiichi Shimizu , Nobuhito Makino , Manabu Kawabe
发明人： Eiichi Shimizu , Nobuhito Makino , Manabu Kawabe
IPC分类号： H01L21/00 , C23C14/00 , C23C16/00
CPC分类号： C30B25/10 , C23C16/4583
摘要： It is to provide a vapor phase growth apparatus which can perform vapor phase growth of a thin film having a good uniformity throughout a surface of a wafer. The vapor phase growth apparatus includes at least a sealable reactor, a wafer containing member (wafer holder) installed within the reactor and having a wafer mounting portion (pocket hole) on a surface thereof for holding a wafer, a gas supply member (gas inlet pipe) for supplying raw material gas towards the wafer, a heating member (heater) for heating the wafer, and a heat uniformizing member (susceptor) for holding the wafer containing member and uniformizing heat from the heating member, wherein raw material gas is supplied into the reactor in a high temperature environment while heating the wafer by using the heating member via the heat uniformizing member and the wafer containing member, to form a film grown on a surface of the wafer, and wherein a recess portion depressed in a dome shape is formed at a back side of the wafer containing member.
摘要翻译：本发明提供一种气相生长装置，其能够在整个晶片的表面上实现均匀性均匀的薄膜的气相生长。气相生长装置至少包括可密封的反应器，安装在反应器内的晶片容纳构件（晶片保持器），并且在其表面上具有用于保持晶片的晶片安装部分（凹穴），气体供给构件用于向晶片供应原料气体的加热构件（加热器），用于保持晶片容纳构件的热均匀化构件（基座），并且来自加热构件的均匀化热量，其中提供原料气体在高温环境下进入反应器，同时通过使用加热构件经由热均匀化构件和晶片容纳构件加热晶片，以形成在晶片的表面上生长的膜，并且其中凹陷的圆顶形状的凹部形成在晶片容纳构件的背面。

10. 发明授权

US07352250B2 Phase locked loop circuits, offset PLL transmitters, radio frequency integrated circuits and mobile phone systems 有权
标题翻译：锁相环电路，偏移PLL发射机，射频集成电路和手机系统
公开(公告)号：US07352250B2
公开(公告)日：2008-04-01
申请号：US11341615
申请日：2006-01-30
申请人： Yukinori Akamine , Manabu Kawabe , Satoshi Tanaka , Yasuo Shima , Ryoichi Takano
发明人： Yukinori Akamine , Manabu Kawabe , Satoshi Tanaka , Yasuo Shima , Ryoichi Takano
IPC分类号： H03L7/07 , H03L7/085
CPC分类号： H03L7/0895 , H03C3/0933 , H03C3/0966 , H03C3/0983 , H03C3/0991 , H03L7/0898 , H03L7/107 , H03L7/185
摘要： A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.
摘要翻译：配有环路增益检测电路的PLL电路，可以抑制环路增益的变化。当检测到环路增益时，首先改变到相位检测器的第二输入（IN-2）的输入信号的频率，并且通过电压锁定振荡器的输出来检测对应于该变化的响应。通过将电压锁定振荡器的输出与计数器连接并将计数器的输出与积分器连接来进行检测。通过对电荷泵电流值的检测结果执行反馈来优化锁相环特性。

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