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1. 发明申请

US20140089561A1 Techniques Associated with Protecting System Critical Data Written to Non-Volatile Memory 审中-公开
标题翻译：与保护系统关键数据相关的技术写入非易失性存储器
公开(公告)号：US20140089561A1
公开(公告)日：2014-03-27
申请号：US13627407
申请日：2012-09-26
申请人： Kiran Pangal , Ravi H. Motwani , Prashant S. Damle
发明人： Kiran Pangal , Ravi H. Motwani , Prashant S. Damle
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F11/1012 , G06F12/0238 , G06F2212/1032 , G06F2212/1041 , G06F2212/403 , G06F2212/7202 , G06F2212/7207 , G11C16/10 , G11C16/3459 , G11C16/349
摘要： Examples are disclosed for techniques associated with protecting system critical data written to non-volatile memory. In some examples, system critical data may be written to a non-volatile memory using a first data protection scheme. User data that includes non-system critical data may also be written to the non-volatile memory using a second data protection scheme. For these examples, both data protection schemes may have a same given data format size. Various examples are provided for use of the first data protection scheme that may provide enhanced protection for the system critical data compared to protection provided to user data using the second data protection scheme. Other examples are described and claimed.
摘要翻译：公开了与保护写入非易失性存储器的系统关键数据相关的技术的示例。在一些示例中，可以使用第一数据保护方案将系统关键数据写入非易失性存储器。包括非系统关键数据的用户数据也可以使用第二数据保护方案写入非易失性存储器。对于这些示例，两个数据保护方案可以具有相同的给定数据格式大小。为使用第一数据保护方案提供了各种示例，该方案可以与使用第二数据保护方案提供给用户数据的保护相比提供对系统关键数据的增强保护。其他的例子被描述和要求保护。

2. 发明申请

US20150220387A1 ERROR CORRECTION IN NON_VOLATILE MEMORY 有权
标题翻译： NON_VOLATILE MEMORY中的错误修正
公开(公告)号：US20150220387A1
公开(公告)日：2015-08-06
申请号：US14126310
申请日：2013-09-27
申请人： Zion S. KWOK , Ravi H. MOTWANI , Kiran PANGAL , Prashant S. DAMLE
发明人： Zion S. Kwok , Ravi H. Motwani , Kiran Pangal , Prashant S. Damle
IPC分类号： G06F11/10 , H03M13/15 , G11C29/52
CPC分类号： G06F11/1068 , G06F11/10 , G06F11/1044 , G06F11/108 , G06F12/00 , G06F2212/7207 , G11C29/52 , H03M13/1515 , H03M13/152
摘要： Apparatus, systems, and methods for error correction in memory are described. In one embodiment, a memory controller comprises logic to receive a read request for data stored in a memory, retrieve the data and at least one associated error correction codeword, wherein the data and an associated error correction codeword is distributed across a plurality of memory devices in memory, apply a first error correction routine to decode the error correction codeword retrieved with the data and in response to an uncorrectable error in the error correction codeword, apply a second error correction routine to the plurality of devices in memory. Other embodiments are also disclosed and claimed.
摘要翻译：描述了存储器中用于纠错的装置，系统和方法。在一个实施例中，存储器控制器包括接收对存储在存储器中的数据的读取请求的逻辑，检索数据和至少一个相关联的纠错码字，其中数据和相关联的纠错码字分布在多个存储器件在存储器中，应用第一纠错程序来解码用数据检索的纠错码字，并响应错误校正码字中的不可校正错误，对存储器中的多个设备应用第二纠错例程。还公开并要求保护其他实施例。

3. 发明申请

US20150089310A1 USE OF ERROR CORRECTION POINTERS TO HANDLE ERRORS IN MEMORY 有权
标题翻译：使用错误修正指针来处理存储器中的错误
公开(公告)号：US20150089310A1
公开(公告)日：2015-03-26
申请号：US14129070
申请日：2013-09-24
申请人： Ravi H. Motwani , Kiran Pangal
发明人： Ravi H. Motwani , Kiran Pangal
IPC分类号： G06F11/10 , G06F11/07
CPC分类号： G06F11/073 , G06F11/076 , G06F11/0772 , G06F11/1048
摘要： Methods, apparatuses, and systems related to use of error correction pointers (ECPs) to handle hard errors in memory are described herein. In embodiments, a read module of a memory controller may read a codeword stored in a memory. The read module may determine a number of hard errors in the codeword. Responsive to a determination that the number of hard errors exceeds a threshold, the read module may store ECP information associated with the hard errors. The read module may include an error correction code (ECC) module to perform an ECC process on the codeword. The read module may use the ECP information to decode the codeword to recover the data responsive to a determination that the ECC process failed. Other embodiments may be described and claimed.
摘要翻译：这里描述了使用纠错指针（ECP）来处理存储器中的硬错误的方法，装置和系统。在实施例中，存储器控制器的读取模块可以读取存储在存储器中的代码字。读取模块可以确定码字中的许多硬错误。响应于确定硬错误的数量超过阈值，读取模块可以存储与硬错误相关联的ECP信息。读取模块可以包括用于对码字执行ECC处理的纠错码（ECC）模块。读取模块可以使用ECP信息来解码码字以响应于ECC过程失败的确定来恢复数据。可以描述和要求保护其他实施例。

4. 发明申请

US20140149825A1 SCALING FACTORS FOR HARD DECISION READS OF CODEWORDS DISTRIBUTED ACROSS DIE 有权
标题翻译：用于硬件决策阅读的缩放因子
公开(公告)号：US20140149825A1
公开(公告)日：2014-05-29
申请号：US13687951
申请日：2012-11-28
申请人： Ravi H. Motwani , Kiran Pangal
发明人： Ravi H. Motwani , Kiran Pangal
IPC分类号： H03M13/05 , H03M13/13
CPC分类号： H03M13/13 , G06F11/1012 , H03M13/1102 , H03M13/29 , H03M13/2957 , H03M13/3723 , H03M13/3746 , H03M13/612 , H03M13/6337
摘要： Embodiments include methods, apparatuses, and instructions for encoding a codeword of data as codeword portions stored across multiple die in a non-volatile memory. Embodiments further include a decoder which may be configured to decode the portions of the codeword using hard decision reads. The decoder may then be configured to estimate the quality of each die, and apply a scaling factor to the decoded codeword portions such that confidence or reliability information can be determined for the codeword.
摘要翻译：实施例包括用于将数据的码字编码为在非易失性存储器中跨多个存储器存储的码字部分的方法，装置和指令。实施例还包括解码器，其可以被配置为使用硬判决读取对码字的部分进行解码。解码器然后可以被配置为估计每个管芯的质量，并将缩放因子应用于解码的码字部分，使得可以为码字确定置信度或可靠性信息。

5. 发明申请

US20150135036A1 MEMORY CONTROLLER WITH DISTRIBUTION TRANSFORMER 有权
标题翻译：带分配变压器的内存控制器
公开(公告)号：US20150135036A1
公开(公告)日：2015-05-14
申请号：US14129066
申请日：2013-09-25
申请人： Ravi H. Motwani , Kiran Pangal
发明人： Ravi H. Motwani , Kiran Pangal
IPC分类号： G06F11/10
CPC分类号： G06F11/1076 , G06F11/1012 , G06F13/16 , G06F13/1694 , G11C7/1006 , G11C13/0004 , G11C13/0069
摘要： Methods, apparatuses, and systems are described related to memory controllers for memory. In one embodiment, a memory controller may include a distribution transformer configured to receive data to be stored into a memory, wherein the data has a distribution of m1:n1 ratio for bits having a first logic value and bits having a second logic value, where m1 and n1 are real numbers. The distribution transformer may transform the data into skewed data, wherein the skewed data has a distribution of m2:n2 ratio for bits having the first logic value and bits having the second logic value, where m2 and n2 are real numbers that are different from one another and respectively differ from m1 and n1. The distribution transformer may output the skewed data for storage in the memory. Other embodiments may be described and claimed.
摘要翻译：描述与存储器的存储器控制器相关的方法，装置和系统。在一个实施例中，存储器控制器可以包括被配置为接收要存储到存储器中的数据的分配变压器，其中所述数据具有用于具有第一逻辑值的位和具有第二逻辑值的位的m1：n1比率分布，其中 m1和n1是实数。分配变压器可以将数据变换为偏斜数据，其中偏斜数据具有具有第一逻辑值的位和具有第二逻辑值的位的m2：n2比的分布，其中m2和n2是不同于一个的实数另一个，分别不同于m1和n1。配电变压器可以输出偏斜数据以存储在存储器中。可以描述和要求保护其他实施例。

6. 发明申请

US20140245096A1 SINGLE-BIT ERROR CORRECTION 有权
标题翻译：单位错误校正
公开(公告)号：US20140245096A1
公开(公告)日：2014-08-28
申请号：US13780690
申请日：2013-02-28
申请人： Ravi H. Motwani , Kiran Pangal
发明人： Ravi H. Motwani , Kiran Pangal
IPC分类号： H03M13/29
CPC分类号： H03M13/3715 , H03M13/13 , H03M13/1515 , H03M13/152
摘要： Embodiments include device, storage media, and methods for decoding a codeword of encoded data. In embodiments, a processor may be coupled with a decoder and configured to multiply the codeword and a parity-check matrix of the encoded data to produce a syndrome. If the syndrome is non-zero then the processor may identify a bit error in the codeword based at least in part on a comparison of the syndrome to one or more columns of the parity-check matrix. Other embodiments may be described and claimed.
摘要翻译：实施例包括用于对编码数据的码字进行解码的设备，存储介质和方法。在实施例中，处理器可以与解码器耦合，并且被配置为将码字和编码数据的奇偶校验矩阵相乘以产生综合征。如果综合征非零，则处理器可以至少部分地基于校验子与奇偶校验矩阵的一个或多个列的比较来识别码字中的位错误。可以描述和要求保护其他实施例。

7. 发明申请

US20140122963A1 IDENTIFICATION OF NON-VOLATILE MEMORY DIE FOR USE IN REMEDIAL ACTION 有权
标题翻译：识别非挥发性记忆体用于补救行动
公开(公告)号：US20140122963A1
公开(公告)日：2014-05-01
申请号：US13662160
申请日：2012-10-26
申请人： Ravi H. Motwani , Kiran Pangal
发明人： Ravi H. Motwani , Kiran Pangal
IPC分类号： H03M13/29
CPC分类号： H03M13/2927 , H03M13/09 , H03M13/1102 , H03M13/293 , H03M13/2948 , H03M13/2957
摘要： Embodiments of apparatus, methods, storage drives, computer-readable media, systems and devices are described herein for identification of die of non-volatile memory for use in remedial action. In various embodiments, a first block may be configured to encode data to be stored in a non-volatile memory as a codeword. In various embodiments, the first block may be configured to store respective portions of the codeword in a distributed manner across a plurality of die of the non-volatile memory. In various embodiments, the first block may be configured to generate respective error detection codes for the plurality of die.
摘要翻译：本文描述了装置，方法，存储驱动器，计算机可读介质，系统和设备的实施例，用于识别用于补救动作的非易失性存储器的管芯。在各种实施例中，第一块可以被配置为将要存储在非易失性存储器中的数据编码为码字。在各种实施例中，第一块可以被配置为以分布式方式存储码字的相应部分跨越非易失性存储器的多个管芯。在各种实施例中，第一块可以被配置为为多个管芯生成相应的检错代码。

8. 发明授权

US09043681B2 Reconstructing codewords using a side channel 有权
标题翻译：使用侧面信道重建码字
公开(公告)号：US09043681B2
公开(公告)日：2015-05-26
申请号：US13996151
申请日：2012-03-28
申请人： Pranav Kalavade , Ravi H. Motwani
发明人： Pranav Kalavade , Ravi H. Motwani
IPC分类号： H03M13/00 , G06F11/14 , H03M13/11 , H03M13/29 , G06F11/10
CPC分类号： G06F11/1412 , G06F11/1044 , G06F11/1402 , H03M13/1102 , H03M13/2906 , H03M13/2927
摘要： Embodiments of the present disclosure describe device, methods, computer-readable media and system configurations for decoding codewords using a side channel. In various embodiments, a memory controller may be configured to determine that m of n die of non-volatile memory (“NVM”) have failed iterative decoding. In various embodiments, the memory controller may be further configured to generate a side channel from n-m non-failed die and the m failed die other than a first failed die. In various embodiments, the memory controller may be further configured to reconstruct, using iterative decoding, a codeword stored on the first failed die of the m failed die based on the generated side channel and on soft input to an attempt to iteratively decode data stored on the first failed die. In various embodiments, the iterative decoding may include low-density parity-check decoding. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了使用侧信道对码字进行解码的设备，方法，计算机可读介质和系统配置。在各种实施例中，存储器控制器可以被配置为确定非易失性存储器（“NVM”）的n个管芯的m具有失败的迭代解码。在各种实施例中，存储器控制器还可以被配置为从n-m非故障芯片和除了第一故障芯片之外的m个故障模具产生侧通道。在各种实施例中，存储器控制器还可以被配置为基于生成的侧信道和软输入来重建使用迭代解码存储在m个失败管芯的第一个故障管芯上的代码字，以尝试迭代地解码存储在第一个失败的死亡在各种实施例中，迭代解码可以包括低密度奇偶校验解码。可以描述和/或要求保护其他实施例。

9. 发明申请

US20120159285A1 STORAGE DRIVE WITH LDPC CODING 有权
标题翻译：存储驱动与LDPC编码
公开(公告)号：US20120159285A1
公开(公告)日：2012-06-21
申请号：US12971831
申请日：2010-12-17
申请人： Ravi H. Motwani
发明人： Ravi H. Motwani
IPC分类号： G06F11/10
CPC分类号： G06F11/1012 , H03M13/1102
摘要： For storage drives with LDPC encoded data, read techniques are provided whereby an errantly read memory unit (e.g., faulty LDPC codeword) may be recovered.
摘要翻译：对于具有LDPC编码数据的存储驱动器，提供读取技术，由此可以恢复错误读取的存储器单元（例如，有缺陷的LDPC码字）。

10. 发明申请

US20150162100A1 COUNTER TO LOCATE FAULTY DIE IN A DISTRIBUTED CODEWORD STORAGE SYSTEM 有权
标题翻译：计数器在分布式编码存储系统中定位故障
公开(公告)号：US20150162100A1
公开(公告)日：2015-06-11
申请号：US14099551
申请日：2013-12-06
申请人： Ravi H. Motwani
发明人： Ravi H. Motwani
IPC分类号： G11C29/44
CPC分类号： G11C29/44 , G11C29/42 , G11C29/82 , G11C2029/0409 , G11C2029/0411
摘要： Methods and apparatus related to utilization of counter(s) for locating faulty die in a distributed codeword storage system are described. In one embodiment, first logic determines a plurality of values. Each of the plurality of values corresponds to a number of zeros or a number of ones in bits read from a portion of each of a plurality of memory dies. Second logic determines one or more candidates as a faulty die amongst the plurality of memory dies based at least in part on a comparison of the plurality of values for the plurality of memory dies. Other embodiments are also disclosed and claimed.
摘要翻译：描述了在分布式码字存储系统中利用计数器定位故障芯片的方法和装置。在一个实施例中，第一逻辑确定多个值。多个值中的每一个对应于从多个存储器管芯的每个存储器管芯的一部分读取的零的数量或数量的数量。第二逻辑至少部分地基于多个存储器管芯的多个值的比较，将一个或多个候选作为多个存储器管芯中的故障管芯来确定。还公开并要求保护其他实施例。

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