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1. 发明申请

US20080248807A1 METHOD AND APPARATUS FOR CONTROLLING A CALL IN A COMMUNICATION SYSTEM 审中-公开
标题翻译：用于控制通信系统中的呼叫的方法和装置
公开(公告)号：US20080248807A1
公开(公告)日：2008-10-09
申请号：US12062876
申请日：2008-04-04
申请人： Ki-Back Kim , Ju-Yong Lee , Dong-Soo Park
发明人： Ki-Back Kim , Ju-Yong Lee , Dong-Soo Park
IPC分类号： H04Q7/20
CPC分类号： H04W28/24 , H04W72/08 , H04W76/10 , H04W92/10 , H04W92/12
摘要： A method for controlling a call, by a base station, in a communication system is provided. The method includes receiving a call admission request for call connection from a mobile station; determining whether to admit the call admission request taking into account a backhaul section capacity available in a backhaul section and a wireless section capacity available in a wireless section; and transmitting information indicating the determination result to the mobile station. The wireless section indicates a section between the base station and the mobile station, and the backhaul section indicates a section between the base station and a base station controller.
摘要翻译：提供了一种用于在通信系统中由基站控制呼叫的方法。该方法包括从移动台接收呼叫接入请求，用于呼叫连接; 确定是否考虑到在回程部分中可用的回程部分容量和无线部分中可用的无线部分容量来允许呼叫许可请求; 以及向移动台发送指示确定结果的信息。无线部分表示基站与移动台之间的部分，回程部分表示基站与基站控制器之间的部分。

2. 发明申请

US20080198797A1 APPARATUS AND METHOD FOR MULTICAST AND BROADCAST SERVICE IN BROADBAND WIRELESS ACCESS SYSTEM 失效
标题翻译：宽带无线接入系统中的多播和广播服务的装置和方法
公开(公告)号：US20080198797A1
公开(公告)日：2008-08-21
申请号：US12034689
申请日：2008-02-21
申请人： Eun-Chan Park , Ki-Back Kim , Ju-Yong Lee
发明人： Eun-Chan Park , Ki-Back Kim , Ju-Yong Lee
IPC分类号： H04Q7/00
CPC分类号： H04W72/005
摘要： Disclosed is an apparatus and method for an MBS service in a BWA system. An apparatus of a base station includes a time controller, a CAC processor, and a buffer controller. The time controller manages a broadcast start time and a broadcast end time and generates a broadcast start message at a predetermined time before the actual broadcast start time. Upon receipt of the generated broadcast start message from the time controller, the CAC processor calculates a capacity decrease due to broadcast service and subtracts the capacity decrease from the current available capacity to update the available capacity. Upon receipt of the generated broadcast start message from the time controller, the buffer controller controls the buffer occupation of unicast traffic in order to provide the buffer space required for a broadcast service.
摘要翻译：公开了一种BWA系统中的MBS服务的装置和方法。基站的装置包括时间控制器，CAC处理器和缓冲器控制器。时间控制器管理广播开始时间和广播结束时间，并且在实际广播开始时间之前的预定时间生成广播开始消息。当从时间控制器接收到生成的广播开始消息时，CAC处理器计算由广播服务引起的容量减少，并从当前可用容量减去容量减少以更新可用容量。当从时间控制器接收到生成的广播开始消息时，缓冲器控制器控制单播业务的缓冲器占用，以提供广播服务所需的缓冲区空间。

3. 发明授权

US08411563B2 Apparatus and method for multicast and broadcast service in broadband wireless access system 失效
标题翻译：宽带无线接入系统中组播广播业务的装置及方法
公开(公告)号：US08411563B2
公开(公告)日：2013-04-02
申请号：US12034689
申请日：2008-02-21
申请人： Eun-Chan Park , Ki-Back Kim , Ju-Yong Lee
发明人： Eun-Chan Park , Ki-Back Kim , Ju-Yong Lee
IPC分类号： H04L1/00
CPC分类号： H04W72/005
摘要： Disclosed is an apparatus and method for an MBS service in a BWA system. An apparatus of a base station includes a time controller, a CAC processor, and a buffer controller. The time controller manages a broadcast start time and a broadcast end time and generates a broadcast start message at a predetermined time before the actual broadcast start time. Upon receipt of the generated broadcast start message from the time controller, the CAC processor calculates a capacity decrease due to broadcast service and subtracts the capacity decrease from the current available capacity to update the available capacity. Upon receipt of the generated broadcast start message from the time controller, the buffer controller controls the buffer occupation of unicast traffic in order to provide the buffer space required for a broadcast service.
摘要翻译：公开了一种BWA系统中的MBS服务的装置和方法。基站的装置包括时间控制器，CAC处理器和缓冲器控制器。时间控制器管理广播开始时间和广播结束时间，并且在实际广播开始时间之前的预定时间生成广播开始消息。当从时间控制器接收到生成的广播开始消息时，CAC处理器计算由广播服务引起的容量减少，并从当前可用容量减去容量减少以更新可用容量。当从时间控制器接收到生成的广播开始消息时，缓冲器控制器控制单播业务的缓冲器占用，以提供广播服务所需的缓冲区空间。

4. 发明授权

US07476585B2 Semiconductor device including storage node and method of manufacturing the same 有权
标题翻译：包括存储节点的半导体器件及其制造方法
公开(公告)号：US07476585B2
公开(公告)日：2009-01-13
申请号：US11621507
申请日：2007-01-09
申请人： Chang-Hyun Cho , Tae-Young Chung , Cheol-Ju Yun , Jae-Goo Lee , Ju-Yong Lee
发明人： Chang-Hyun Cho , Tae-Young Chung , Cheol-Ju Yun , Jae-Goo Lee , Ju-Yong Lee
IPC分类号： H01L21/8239
CPC分类号： H01L27/10891 , H01L27/0207 , H01L27/10814 , H01L27/10855 , H01L28/91
摘要： A semiconductor device including storage nodes and a method of manufacturing the same: The method includes forming an insulating layer and an etch stop layer on a semiconductor substrate; forming storage node contact bodies to be electrically connected to the semiconductor substrate by penetrating the insulating layer and the etch stop layer; forming landing pads on the etch stop layer to be electrically connected to the storage node contact bodies, respectively; and forming storage nodes on the landing pads, respectively, the storage nodes of which outward sidewalls are completely exposed and which are arranged at an angle to each other.
摘要翻译：一种包括存储节点的半导体器件及其制造方法，该方法包括在半导体衬底上形成绝缘层和蚀刻停止层; 通过穿透所述绝缘层和所述蚀刻停止层形成要与所述半导体衬底电连接的存储节点接触体; 在所述蚀刻停止层上形成分别电连接到所述存储节点接触体的着陆焊盘; 以及分别在着陆焊盘上形成存储节点，其外侧壁完全暴露的存储节点和彼此成角度地布置。

5. 发明授权

US5924765A Shock absorber for side sills of chassis 失效
标题翻译：底盘侧梁减震器
公开(公告)号：US5924765A
公开(公告)日：1999-07-20
申请号：US942345
申请日：1997-10-01
申请人： Ju-Yong Lee
发明人： Ju-Yong Lee
IPC分类号： B62D25/20 , B62D21/15 , B62D21/04
CPC分类号： B62D21/157 , B62D25/025
摘要： A shock absorber for side sills of a chassis is disclosed. The shock absorber is installed in each side sill of a chassis and effectively absorbs a side impact at the side sill in the event of a side collision of a car, thus effectively reducing impact transmission velocity and preventing the side sill from being badly thrust into the passenger compartment in such a collision. In the shock absorber, a fixed guide pipe penetrates the center of a reinforcing member of a side sill box with both ends of the pipe being projected into inner and outer panels of the side sill box. A retractable damper is movably inserted into the guide pipe at a position inside the outer panel, thus primarily absorbing the side impact. A support member is elastically and movably inserted into the guide pipe at a position inside the inner panel, thus finally absorbing the impact.
摘要翻译：公开了一种用于底架的侧槛的减震器。减震器安装在底盘的每个底梁上，在轿厢侧面碰撞的情况下有效地吸收侧梁上的侧面碰撞，从而有效地降低冲击传播速度，并防止侧梁被严重推入乘客舱在这样的碰撞。在减震器中，固定的导管穿过下纵梁的加强件的中心，其两端被突出到下料箱的内板和外板中。可伸缩阻尼器可在外板内的位置处可移动地插入导管中，从而主要吸收侧面碰撞。支撑构件在内板内的位置处弹性地可移动地插入导管中，从而最终吸收冲击。

6. 发明授权

US07153727B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07153727B2
公开(公告)日：2006-12-26
申请号：US10719624
申请日：2003-11-20
申请人： Ju-Yong Lee , Kyu-Hyun Lee
发明人： Ju-Yong Lee , Kyu-Hyun Lee
IPC分类号： H01L21/82
CPC分类号： H01L27/10855 , H01L21/31144 , H01L21/76831 , H01L21/76897 , H01L27/10885 , H01L2924/0002 , H01L2924/00
摘要： Disclosed herein are a semiconductor device and a method of manufacturing the same that increases the reliability of these devices as size design limitations decrease. Generally, a first insulating film, and wiring, including conductive film patterns and second insulating film patterns are formed on a substrate. Third insulating film patterns including a silicon-oxide-based material are formed on sidewalls of the wiring, and contact patterns and spacers on the sidewalls thereof for defining contact hole regions are formed on the wiring. The contact holes contact surfaces of the third insulating film patterns and pass through the first insulating film. Thus, the thickness of a second insulating film pattern used in the wiring can be minimized, thereby increasing a gap-fill margin between the wiring. A parasitic capacitance between the wiring can be reduced because silicon oxide spacers with a low dielectric constant are formed on sidewalls of the wiring.
摘要翻译：本文公开了一种半导体器件及其制造方法，其随着尺寸设计限制的降低而增加这些器件的可靠性。通常，在基板上形成包括导电膜图案和第二绝缘膜图案的第一绝缘膜和布线。在布线的侧壁上形成包括基于氧化硅的材料的第三绝缘膜图案，并且在布线上形成用于限定接触孔区域的侧壁上的接触图形和间隔物。接触孔接触第三绝缘膜图案的表面并穿过第一绝缘膜。因此，可以使布线中使用的第二绝缘膜图案的厚度最小化，从而增加布线之间的间隙填充余量。由于在布线的侧壁上形成具有低介电常数的氧化硅间隔物，所以布线之间的寄生电容可以减小。

7. 发明授权

US06388993B1 ATM switch and a method for determining buffer threshold 失效
标题翻译： ATM交换机和确定缓冲区阈值的方法
公开(公告)号：US06388993B1
公开(公告)日：2002-05-14
申请号：US09095744
申请日：1998-06-11
申请人： Jae-Jin Shin , Kyung-Geun Lee , Dan-Keun Sung , Jeong-Won Heo , Sung-Hyuk Byun , Ju-Yong Lee , Jin-Woo Yang
发明人： Jae-Jin Shin , Kyung-Geun Lee , Dan-Keun Sung , Jeong-Won Heo , Sung-Hyuk Byun , Ju-Yong Lee , Jin-Woo Yang
IPC分类号： G06F1100
CPC分类号： H04L49/9047 , H04L47/50 , H04L47/6215 , H04L49/3018 , H04L49/506 , H04L49/90 , H04L49/901 , H04L49/9078 , H04L2012/5635 , H04L2012/5682
摘要： An ATM switch having the buffer threshold controller to control the cell input into the switching element using the back-pressure signal and a method for determining the buffer threshold according to the buffer threshold controller are disclosed. The ATM switch includes buffer pool storing the cell input to the switch; buffer pool control part storing the buffer pool occupancy information per input port of the buffer pool; threshold control part receiving the buffer pool occupancy information from the buffer pool control part and calculating the threshold per input port periodically and then sending it to the buffer pool control part; input crosspoint control part controlling the cells input to the buffer pool by receiving the control signal from the buffer pool control part; and output crosspoint control part controlling the cells output from the buffer pool by receiving the control signal from the buffer pool control part. The method includes the steps of calculating ri, the buffer pool occupancy rate of the ith input port (i=1, 2, 3, . . . , N); calculating rH, the threshold of the buffer pool occupancy rate of the ith input port; calculating Li, the number of occupation of the cells in the buffer pool of the ith input port; calculating the difference, Dorder(k)=tj−Lj(k=1, 2, 3, N . . . , N) between tj, the threshold of the jth input port and Lj, the number of cells stored in the buffer pool, where i≠j (j=1, 2, 3, . . . , N); calculating tD—order(k), the threshold in case where the tj−Lj is the kth value in descending order from the N input ports; calculating bD—order(k), minimum threshold to guarantee the minimum cell input; and comparing &Dgr;, the minimum unit of increase or decrease of the threshold and the value of tD—order(k)−bD—order(k).
摘要翻译：公开了具有缓冲器阈值控制器的ATM开关，其使用背压信号来控制对开关元件的输入，以及根据缓冲器阈值控制器确定缓冲器阈值的方法。 ATM交换机包括存储单元输入到交换机的缓冲池; 缓冲池控制部分，每个缓冲池的每个输入端口存储缓冲池占用信息; 阈值控制部分从缓冲池控制部分接收缓冲池占用信息，周期性地计算每个输入端口的阈值，然后发送给缓冲池控制部分; 输入交叉点控制部分，通过从缓冲池控制部分接收控制信号来控制输入到缓冲池的单元; 并通过从缓冲池控制部分接收控制信号，输出控制从缓冲池输出的单元的交叉点控制部分。该方法包括以下步骤：计算第i个输入端口的缓冲池占用率（i = 1,2,3，...，N）; 计算rH，第i个输入端口的缓冲池占用率的阈值; 计算Li，第i个输入端口的缓冲池中的单元的占用次数; 在第j个输入端口和Lj的阈值之间计算差值，Dorder（k）= tj-Lj（k = 1,2,3，N ...，N），存储在缓冲池中的单元数，其中i <> j（j = 1,2,3，...，N）; 在从N个输入端口降序的情况下计算tD-order（k），tj-Lj是第k个值的阈值; 计算bD阶（k），最小阈值以保证最小单元格输入; 并比较DELTA，阈值的增加或减小的最小单位和tD阶（k）-bD阶（k）的值。

8. 发明授权

US07920400B2 Semiconductor integrated circuit device and method of fabricating the semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件及半导体集成电路器件的制造方法
公开(公告)号：US07920400B2
公开(公告)日：2011-04-05
申请号：US12055035
申请日：2008-03-25
申请人： Ju-Yong Lee , Sung-Ho Jang , Tae-Young Chung , Joon Han
发明人： Ju-Yong Lee , Sung-Ho Jang , Tae-Young Chung , Joon Han
IPC分类号： G11C5/06
CPC分类号： H01L27/0207 , H01L27/105 , H01L27/1052 , H01L27/10855 , H01L27/10876 , H01L27/10882 , H01L27/10885 , H01L27/10888 , H01L27/10891 , H01L29/66621
摘要： A semiconductor integrated circuit device having a 6F2 layout is provided. The semiconductor integrated circuit device includes a substrate; a plurality of unit active regions disposed in the substrate and extending in a first direction; first and second access transistors including first and second gate lines disposed on the substrate and extending across the unit active regions in a second direction forming an acute angle with the first direction; a first junction area disposed in the substrate between the first and second gate lines and second junction areas disposed on sides of the first and second gate lines where the first junction area is not disposed; a plurality of bitlines disposed on the substrate and extending in a third direction forming an acute angle with the first direction; and a plurality of bitline contacts directly connecting the first junction area and the bitlines.
摘要翻译：提供具有6F2布局的半导体集成电路器件。半导体集成电路器件包括衬底; 设置在所述基板中并沿第一方向延伸的多个单位活性区域; 第一和第二存取晶体管，包括设置在衬底上的第一和第二栅极线，并且沿与第一方向成锐角的第二方向延伸跨过单元有源区; 设置在第一和第二栅极线之间的衬底中的第一接合区域和设置在不设置第一接合区域的第一和第二栅极线的侧面上的第二接合区域; 多个位线设置在所述基板上并沿与所述第一方向成锐角的第三方向延伸; 以及直接连接第一连接区域和位线的多个位线触点。

9. 发明授权

US07180118B2 Semiconductor device including storage node and method of manufacturing the same 有权
标题翻译：包括存储节点的半导体器件及其制造方法
公开(公告)号：US07180118B2
公开(公告)日：2007-02-20
申请号：US10830895
申请日：2004-04-22
申请人： Chang-Hyun Cho , Tae-Young Chung , Cheol-Ju Yun , Jae-Goo Lee , Ju-Yong Lee
发明人： Chang-Hyun Cho , Tae-Young Chung , Cheol-Ju Yun , Jae-Goo Lee , Ju-Yong Lee
IPC分类号： H01L27/108
CPC分类号： H01L27/10891 , H01L27/0207 , H01L27/10814 , H01L27/10855 , H01L28/91
摘要： A semiconductor device including storage nodes and a method of manufacturing the same: The method includes forming an insulating layer and an etch stop layer on a semiconductor substrate; forming storage node contact bodies to be electrically connected to the semiconductor substrate by penetrating the insulating layer and the etch stop layer; forming landing pads on the etch stop layer to be electrically connected to the storage node contact bodies, respectively; and forming storage nodes on the landing pads, respectively, the storage nodes of which outward sidewalls are completely exposed and which are arranged at an angle to each other.
摘要翻译：一种包括存储节点的半导体器件及其制造方法，该方法包括在半导体衬底上形成绝缘层和蚀刻停止层; 通过穿透所述绝缘层和所述蚀刻停止层形成要与所述半导体衬底电连接的存储节点接触体; 在所述蚀刻停止层上形成分别电连接到所述存储节点接触体的着陆焊盘; 以及分别在着陆焊盘上形成存储节点，其外侧壁完全暴露的存储节点和彼此成角度地布置。

10. 发明授权

US06259698B1 Input buffer controller using back-pressure signals in ATM switches and a method for determining the logical queue size 失效
标题翻译：在ATM交换机中使用背压信号的输入缓冲控制器和确定逻辑队列大小的方法
公开(公告)号：US06259698B1
公开(公告)日：2001-07-10
申请号：US09095727
申请日：1998-06-11
申请人： Jae-Jin Shin , Kyung-Geun Lee , Dan-Keun Sung , Jeong-Won Heo , Sung-Hyuk Byun , Ju-Yong Lee , Jin-Woo Yang
发明人： Jae-Jin Shin , Kyung-Geun Lee , Dan-Keun Sung , Jeong-Won Heo , Sung-Hyuk Byun , Ju-Yong Lee , Jin-Woo Yang
IPC分类号： H04H1228
CPC分类号： H04L49/506 , H04L29/06 , H04L49/15 , H04L49/25 , H04L49/255 , H04L49/3018 , H04L49/3081 , H04L49/90 , H04L2012/5651 , H04L2012/5682
摘要： A controller for the logical buffer depth in ATM switching system and a method for determining the logical queue depth, using the back-pressure signal and the occupied buffer depth information and supporting the P classes, are disclosed. The controller includes Routing Table Element making tag for routing of input cell; Input Buffer storing the cell that a tag is attached to in said routing table element; Switch fabric that reads the cell from said input buffer and then switches it to the output port; and Input buffer controller controlling the logical queue size in said input buffer. And the method for determining the logical queue depth includes the steps of calculating the back-pressure signal occurrence rate bi of the ith class; calculating the back-pressure signal occurrence threshold rate bi—th of the ith class; calculating the buffer depth Ti of the logical queue of the ith class; calculating threshold values TiH, TiL of the two buffer depths of the ith class; calculating the buffer size Li of the logical queue of the ith class; calculating the empty area size Dj(j=1, 2, 3, L, P) of logical queues for the number of p classes.
摘要翻译：公开了一种用于ATM交换系统中的逻辑缓冲器深度的控制器以及使用背压信号和占用缓冲器深度信息并支持P类来确定逻辑队列深度的方法。控制器包括用于路由输入单元的路由表元素制作标签; 输入缓冲器，存储所述路由表元素中附加标签的单元; 交换结构，从所述输入缓冲区读取单元，然后将其切换到输出端口; 以及控制所述输入缓冲器中的逻辑队列大小的输入缓冲器控制器。并且用于确定逻辑队列深度的方法包括计算第i类的背压信号发生率bi的步骤; 计算第i类的背压信号发生阈值率第二; 计算第i类逻辑队列的缓冲区深度Ti; 计算第i类的两个缓冲深度的阈值TiH，TiL; 计算第i类逻辑队列的缓冲区大小Li; 计算p类的数量的逻辑队列的空区域大小Dj（j = 1,2,3，L，P）。

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