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1. 发明申请

US20100067315A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD THEREOF 有权
标题翻译：半导体集成电路及其方法
公开(公告)号：US20100067315A1
公开(公告)日：2010-03-18
申请号：US12346225
申请日：2008-12-30
申请人： Ki Chon Park , Jae-Hoon Cha
发明人： Ki Chon Park , Jae-Hoon Cha
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C8/12
摘要： A semiconductor IC device includes a common column signal generating block providing precolumn strobe signals by using external command signals and a first group of bank addresses among a plurality of bank addresses, and a column strobe signal generating block providing a plurality of column strobe signals to selectively activate a plurality of banks by using the precolumn strobe signals and a second group of bank addresses among the plurality of bank addresses that are not used when the precolumn strobe signals are generated.
摘要翻译：半导体IC器件包括公共列信号生成块，其通过使用外部命令信号和多个存储体地址之中的第一组存储体地址组提供预置选通信号，以及列选通信号生成模块，其选择性地提供多个列选通信号通过使用前级选通信号和当生成预置选通信号时未使用的多个存储体地址之间的第二组存储体地址来激活多个存储体。

2. 发明授权

US07948807B2 Semiconductor memory device having a current consumption reduction in a data write path 失效
标题翻译：具有在数据写入路径中消耗电流消耗的半导体存储器件
公开(公告)号：US07948807B2
公开(公告)日：2011-05-24
申请号：US11964136
申请日：2007-12-26
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： G11C7/10
CPC分类号： G11C7/10 , G11C7/1006 , G11C7/1012 , G11C7/1078 , G11C7/1096
摘要： The present invention describes a semiconductor memory device that can reduce current consumption occurring in a data write path. The semiconductor memory device includes a write path over which any one of general data and representative data corresponding to a particular mode is transferred in correspondence with a prescribed pad. A routing controller allows the representative data to be routed over a transfer path corresponding to any other pads in the particular mode and prevents the general data from being routed over the transfer path in modes other than the particular mode. The semiconductor memory device can reduce current consumption caused by unnecessary toggling of the data through utilization of the routing controller.
摘要翻译：本发明描述了可以减少在数据写入路径中发生的电流消耗的半导体存储器件。半导体存储器件包括与通常数据和对应于特定模式的代表数据中的任何一个对应于规定的焊盘传送的写入路径。路由控制器允许代表性数据通过与特定模式中的任何其它焊盘相对应的传输路径进行路由，并防止通用数据在特定模式以外的模式下通过传输路径进行路由。半导体存储器件可以通过利用路由控制器来减少由不必要的数据切换引起的电流消耗。

3. 发明授权

US07009439B2 Circuit and method for generating internal clock signal 失效
标题翻译：用于产生内部时钟信号的电路和方法
公开(公告)号：US07009439B2
公开(公告)日：2006-03-07
申请号：US10736722
申请日：2003-12-16
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： H03K21/00
CPC分类号： G11C7/222 , G11C7/1072 , H03K5/159
摘要： The present invention relates to a circuit and method for generating an internal clock signal. According to the present invention, it is determined whether an external clock signal is a high frequency or a low frequency. Depending on the determination, the external clock signal is waveform-shaped to generate an internal clock signal or the external clock signal as the internal clock signal as it is. Therefore, rising edge timings of the external clock signal and the internal clock signal become coincident regardless of the frequency of the external clock signal. Reduction in an operating margin within the circuit due to reduction in the pulse width of the internal clock signal is prevented. Thus, the circuit of the present invention can be used in the high frequency and the low frequency at the same time and reliability of the circuit can be improved.
摘要翻译：本发明涉及一种用于产生内部时钟信号的电路和方法。根据本发明，确定外部时钟信号是高频还是低频。根据确定，外部时钟信号是波形形状的，以产生内部时钟信号或外部时钟信号作为内部时钟信号。因此，与外部时钟信号的频率无关，外部时钟信号和内部时钟信号的上升沿定时变得一致。防止由于内部时钟信号的脉冲宽度的减小而减小电路内的工作裕度。因此，本发明的电路可以同时用于高频和低频，并且可以提高电路的可靠性。

4. 发明授权

US08036049B2 Semiconductor memory device including a global input/output line of a data transfer path and its surrounding circuits 有权
标题翻译：半导体存储器件包括数据传输路径的全局输入/输出线及其周围电路
公开(公告)号：US08036049B2
公开(公告)日：2011-10-11
申请号：US12469864
申请日：2009-05-21
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： G11C7/10 , G11C7/22 , G11C8/00
CPC分类号： G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C7/1078 , G11C7/1096 , G11C8/08 , G11C8/14
摘要： A semiconductor memory device includes an input/output line of a data transfer path and its surrounding circuits, comprising a controller which generates a control signal corresponding to command and address input in read and write operation; and a repeater which selects any one of the plurality of bank groups as the control signal to control data transfer between the selected bank group and an input/output pad.
摘要翻译：一种半导体存储器件，包括数据传输路径的输入/输出线及其周围的电路，包括一个控制器，该控制器产生与读和写操作中输入的命令和地址对应的控制信号; 以及中继器，其选择多个存储体组中的任何一个作为控制信号来控制所选择的存储体组与输入/输出焊盘之间的数据传输。

5. 发明授权

US07719918B2 Semiconductor memory device having input/output sense amplification circuit with reduced junction loading and circuit layout area 失效
标题翻译：半导体存储器件具有输入/输出读出放大电路，具有减少的结点负载和电路布局面积
公开(公告)号：US07719918B2
公开(公告)日：2010-05-18
申请号：US11775929
申请日：2007-07-11
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： G11C8/00
CPC分类号： G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C7/1087
摘要： A semiconductor memory device includes a plurality of sense amplifiers that amplify data transferred from each of a couple of banks and output them as amplified signals; a controller configured to determine the output states of the amplified signals outputted from each of the couple of sense amplifiers and to output driving signals corresponding to the output amplified signals; and a driver configured to receive driving signals and to drive a global input/output line in response to the driving signals, wherein the couple of sense amplifiers share the one driver.
摘要翻译：一种半导体存储器件包括：多个读出放大器，用于放大从两个存储体中的每一个传输的数据，并将其作为放大信号输出; 控制器，被配置为确定从所述两对感测放大器中的每一个输出的放大信号的输出状态，并输出与所述输出放大信号相对应的驱动信号; 以及配置成响应于驱动信号接收驱动信号和驱动全局输入/输出线的驱动器，其中所述一对感测放大器共享一个驱动器。

6. 发明授权

US07554864B2 Semiconductor memory device including a global input/output line of a data transfer path and its surrounding circuits 有权
标题翻译：半导体存储器件包括数据传输路径的全局输入/输出线及其周围电路
公开(公告)号：US07554864B2
公开(公告)日：2009-06-30
申请号：US11778380
申请日：2007-07-16
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： G11C7/00 , G11C7/10 , G11C8/00
CPC分类号： G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C7/1078 , G11C7/1096 , G11C8/08 , G11C8/14
摘要： A semiconductor memory device includes an input/output line of a data transfer path and its surrounding circuits, comprising a controller which generates a control signal corresponding to command and address input in read and write operation; and a repeater which selects any one of the plurality of bank groups as the control signal to control data transfer between the selected bank group and an input/output pad.
摘要翻译：一种半导体存储器件，包括数据传输路径的输入/输出线及其周围的电路，包括一个控制器，该控制器产生与读和写操作中输入的命令和地址对应的控制信号; 以及中继器，其选择多个存储体组中的任何一个作为控制信号来控制所选择的存储体组与输入/输出焊盘之间的数据传输。

7. 发明授权

US07843759B2 Semiconductor memory device having reduced current consumption during data mask function 有权
标题翻译：半导体存储器件在数据掩模功能期间具有降低的电流消耗
公开(公告)号：US07843759B2
公开(公告)日：2010-11-30
申请号：US12206824
申请日：2008-09-09
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： G11C8/00
CPC分类号： G11C7/1006 , G11C7/1009 , G11C2207/2227
摘要： The present invention describes a semiconductor memory device having a data mask function and includes a common driving control unit for generating a common driving control signal in response to a data mask signal and a write command signal supplied to the common driving control unit. A plurality of driving units are supplied with the common driving control signal and selectively drive data according to the common driving control signal and transmit the driven data to a plurality of data lines, respectively. Accordingly, a driving and data mask operation of the plurality of driving units is controlled by the common driving control unit, which reduces current consumption and a layout area of the circuit.
摘要翻译：本发明描述了具有数据掩模功能的半导体存储器件，并且包括用于响应于提供给公共驱动控制单元的数据屏蔽信号和写入命令信号产生公共驱动控制信号的公共驱动控制单元。向多个驱动单元提供公共驱动控制信号，并根据公共驱动控制信号选择性地驱动数据，并将驱动数据分别发送到多条数据线。因此，多个驱动单元的驱动和数据掩模操作由公共驱动控制单元控制，这降低了电流消耗和电路的布局面积。

8. 发明申请

US20080198680A1 SEMICONDUCTOR MEMORY DEVICE HAVING INPUT/OUTPUT SENSE AMPLIFICATION CIRCUIT WITH REDUCED JUNCTION LOADING AND CIRCUIT LAYOUT AREA 失效
标题翻译：具有输入/输出感应放大电路的半导体存储器件，具有减少的接线负载和电路布局区域
公开(公告)号：US20080198680A1
公开(公告)日：2008-08-21
申请号：US11775929
申请日：2007-07-11
申请人： Ki Chon Park
发明人： Ki Chon Park
IPC分类号： G11C8/00
CPC分类号： G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C7/1087
摘要： A semiconductor memory device includes an input/output sense amplifier that amplifies a read data and provides it to the external, when making a read operation. The semiconductor memory device includes a plurality of sense amplifiers that amplify data transferred from each bank and output them as amplified signals; a controller that judges the output states of the amplified signals in each sense amplifier to output driving signals corresponding to the output amplified signals; and a driver that drives an global input/output line with the driving signal, wherein the first and second sense amplifiers share the one driver, making it possible to reduce ‘tAA’ and get an advantage of a layout area.
摘要翻译：半导体存储器件包括输入/输出读出放大器，其在进行读取操作时放大读取的数据并将其提供给外部。半导体存储器件包括多个读出放大器，用于放大从每个存储体传送的数据并将其作为放大信号输出; 判断每个读出放大器中放大信号的输出状态以输出与输出放大信号对应的驱动信号的控制器; 以及驱动器，其驱动具有驱动信号的全局输入/输出线，其中第一和第二读出放大器共享一个驱动器，使得可以减小“tAA”并获得布局区域的优点。

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