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1. 发明授权

US06798990B2 Laser safety method for DC coupled parallel optical link 失效
标题翻译：直流耦合并联光链路的激光安全方法
公开(公告)号：US06798990B2
公开(公告)日：2004-09-28
申请号：US09779599
申请日：2001-02-09
申请人： London Terry Brown , Kevin Paul Demsky , Ladd William Freitag , Daniel Scott Hedin , Matthew James Paschal
发明人： London Terry Brown , Kevin Paul Demsky , Ladd William Freitag , Daniel Scott Hedin , Matthew James Paschal
IPC分类号： H04B1002
CPC分类号： H04B10/077 , H04B10/07955 , H04B10/40
摘要： A method and apparatus are provided to ensure that laser optical power does not exceed a “safe” level in a DC coupled open loop parallel optical link in the event that a fiber optic ribbon cable is broken or otherwise severed. A duplex parallel optical link includes a transmitter and receiver pair and a fiber optic ribbon that includes a designated number N of channels that cannot be split. The duplex transceiver includes a corresponding transmitter and receiver that are physically attached to each other and cannot be detached therefrom, so as to ensure safe, laser optical power in the event that the fiber optic ribbon cable is broken or severed. Safe optical power is ensured by redundant current and voltage safety checks, and the corresponding low duty cycle signal is generated by a safety pulse generator in the safety channel.
摘要翻译：提供了一种方法和装置，以确保在光纤带状电缆断裂或以其他方式切断的情况下，直流耦合的开环并联光链路中的激光光功率不超过“安全”级。双工并行光链路包括发射机和接收机对以及光纤带，其包括指定数量N个不能被分裂的信道。双工收发器包括物理上彼此连接并且不能从其分离的相应发射器和接收器，以便在光纤带状电缆断裂或断开的情况下确保安全的激光光功率。通过冗余电流和电压安全检查确保安全光功率，相应的低占空比信号由安全通道中的安全脉冲发生器产生。

2. 发明授权

US06928242B1 Built in self test method and circuit for parallel optical transmitters 失效
标题翻译：内置自检方法和电路并联光发射机
公开(公告)号：US06928242B1
公开(公告)日：2005-08-09
申请号：US09689758
申请日：2000-10-13
申请人： Kevin Paul Demsky , Ladd William Freitag , Matthew James Paschal
发明人： Kevin Paul Demsky , Ladd William Freitag , Matthew James Paschal
IPC分类号： H04B10/08 , H04B10/155
CPC分类号： H04B10/07 , H04B10/50
摘要： An on-chip parallel data generator, including a Built In Self Test (BIST) generator, is integrated into a laser driver array of a parallel optical communication transmitter so that all optical outputs switch simultaneously. The BIST generator requires only one clock input which clocks the BIST generator for all channels. The optical outputs respond to either the on-chip BIST generator or the electrical inputs if a valid signal is present on the inputs.
摘要翻译：包括内置自测（BIST）发生器的片上并行数据发生器被集成到并行光通信发射器的激光驱动器阵列中，使得所有光输出同时切换。 BIST发生器只需要一个时钟输入，为所有通道的BIST发生器提供时钟。如果输入端存在有效信号，光输出将响应片内BIST发生器或电气输入。

3. 发明授权

US06624917B1 Optical power adjustment circuits for parallel optical transmitters 有权
标题翻译：用于并行光发射机的光功率调节电路
公开(公告)号：US06624917B1
公开(公告)日：2003-09-23
申请号：US09429282
申请日：1999-10-28
申请人： Matthew James Paschal , Kevin Paul Demsky , Ladd William Freitag
发明人： Matthew James Paschal , Kevin Paul Demsky , Ladd William Freitag
IPC分类号： H04B1004
CPC分类号： H04B10/564 , H04B10/503
摘要： Optical power adjustment is provided for parallel optical transmitters, in particular, for an array of vertical cavity surface emitting lasers (VCSEL's). The lasers in the array can be independently digitally adjusted with associated digital circuitry to compensate for manufacturing and temperature variations. In particular, the threshold current and modulation current for each VCSEL in the array, as well as a global temperature coefficient for all the VCSEL's in the array, can be digitally setup and adjusted for desired power levels. Once set, the associated digital code can be stored in non-volatile memory, and loaded at powering-up of the transmitters.
摘要翻译：为并行光发射机提供光功率调整，特别是针对垂直腔表面发射激光器（VCSEL）的阵列。阵列中的激光器可以用相关的数字电路独立数字调节，以补偿制造和温度变化。特别地，阵列中的每个VCSEL的阈值电流和调制电流以及阵列中所有VCSEL的全局温度系数可以针对所需功率电平进行数字设置和调整。一旦设置，相关联的数字代码可以存储在非易失性存储器中，并在发送器上电时加载。

4. 发明授权

US06265857B1 Constant current source circuit with variable temperature compensation 有权
标题翻译：具有可变温度补偿的恒流源电路
公开(公告)号：US06265857B1
公开(公告)日：2001-07-24
申请号：US09218340
申请日：1998-12-22
申请人： Kevin Paul Demsky , John Farley Ewen , Matthew James Paschal
发明人： Kevin Paul Demsky , John Farley Ewen , Matthew James Paschal
IPC分类号： G05F308
CPC分类号： G05F3/245 , Y10S323/907
摘要： The constant current source circuit provides current that compensates for changes in performance resulting from changes of temperature. The circuit mixes variable amounts of current having a negative temperature coefficient with current having a positive temperature coefficient. Analog and digital embodiments of the circuit are disclosed. In the analog embodiment, the amount of current having a positive temperature coefficient is added to an amount of current having a negative temperature coefficient as determined by the voltage difference between a variable control voltage input to transistors and a bandgap reference voltage. A transistor in each of two current selectors is connected to the variable control voltage, one of which is connected to ground and the other of which is output; and another transistor in each current selector is connected to the reference voltage, and again one transistor is grounded and the other is output whose current is mixed with the output from the transistor in the first current selector connected to the variable control voltage. A continuous range of temperature coefficients are realizable by varying the control voltage with respect to the bandgap reference voltage. The digital embodiment has a digital-to-analog converter connected to a bias voltage from the current having a positive temperature coefficient and a second digital-to-analog converter connected to a second bias voltage from the current having a negative temperature coefficient. A digital input signal to a corresponding switch determines if its respective transistor in each of the digital-to-analog converters conduct current. The two digital-to-analog converters may be configured in a common centroid arrangement of integrated complementary unit cells. The constant current source circuit can be used to drive off-chip parallel loads such as VCSELs.
摘要翻译：恒流源电路提供电流，补偿温度变化引起的性能变化。该电路将具有负温度系数的可变量的电流与具有正温度系数的电流混合。公开了电路的模拟和数字实施例。在模拟实施例中，具有正温度系数的电流量被加到由输入到晶体管的可变控制电压和带隙参考电压之间的电压差确定的具有负温度系数的电流量。两个电流选择器中的每一个中的晶体管连接到可变控制电压，其中一个连接到地，另一个连接到输出; 并且每个电流选择器中的另一个晶体管连接到参考电压，并且一个晶体管接地，另一个晶体管被输出，其电流与连接到可变控制电压的第一电流选择器中的晶体管的输出混合。可以通过相对于带隙参考电压改变控制电压来实现连续的温度系数范围。数字实施例具有数模转换器，其连接到具有正温度系数的电流的偏置电压和从具有负温度系数的电流连接到第二偏置电压的第二数模转换器。到相应开关的数字输入信号确定其每个数模转换器中的相应晶体管是否导通电流。两个数模转换器可以以集成的互补单元单元的公共质心布置来配置。恒流源电路可用于驱动片外并联负载，如VCSEL。

5. 发明授权

US06462852B1 Selectable low-voltage differential signal/current mode logic (LVDS/CML) receiver with the option of AC or DC coupling 有权
标题翻译：可选择低电压差分信号/电流模式逻辑（LVDS / CML）接收器，可选择交流或直流耦合
公开(公告)号：US06462852B1
公开(公告)日：2002-10-08
申请号：US09429281
申请日：1999-10-28
申请人： Matthew James Paschal , Kevin Paul Demsky
发明人： Matthew James Paschal , Kevin Paul Demsky
IPC分类号： H04B1006
CPC分类号： H04L25/0294 , H03K19/01812 , H03K19/01837 , H04L25/0272 , H04L25/0296
摘要： A selectable receiver includes a first receiver module for receiving first input signal type and a second receiver module, different from the first receiver module, for receiving a second input signal type, both receiver modules coupled to the same receiver inputs. An internal common mode voltage for the first signal type or for the second signal type, is provided by respective common mode voltage networks, to the first or to the second receiver module, to facilitate AC coupling with the appropriate DC common mode voltage required by the signal type. If direct coupled, the internal common mode voltage is effectively swamped out by the common mode voltage of the input signal. The first receiver module or the second receiver module, and the associated first common mode voltage or second common mode voltage, are selected in the receiver based on a control signal. The first receiver module can be a current mode logic (CML) receiver, and the second receiver module can be a low-voltage differential (LVDS) receiver module, e.g., a self-timed interface (STI) receiver module.
摘要翻译：可选接收器包括用于接收第一输入信号类型的第一接收器模块和与第一接收器模块不同的第二接收器模块，用于接收第二输入信号类型，两个接收器模块耦合到相同的接收器输入端。用于第一信号类型或第二信号类型的内部共模电压由相应的共模电压网络提供给第一或第二接收器模块，以便于与所要求的适当DC共模电压的AC耦合信号类型。如果直接耦合，则内部共模电压由输入信号的共模电压有效地消除。基于控制信号在接收机中选择第一接收机模块或第二接收机模块以及相关联的第一共模电压或第二共模电压。第一接收器模块可以是电流模式逻辑（CML）接收器，并且第二接收器模块可以是低压差分（LVDS）接收器模块，例如自定时接口（STI）接收器模块。

6. 发明授权

US06208152B1 Redundant resistor matching detector with constant percentage threshold 失效
标题翻译：具有恒定百分比阈值的冗余电阻匹配检测器
公开(公告)号：US06208152B1
公开(公告)日：2001-03-27
申请号：US09418545
申请日：1999-10-14
申请人： Steven John Baumgartner , Kevin Paul Demsky , Raymond Jonathan Thatcher
发明人： Steven John Baumgartner , Kevin Paul Demsky , Raymond Jonathan Thatcher
IPC分类号： G01R1900
CPC分类号： G01R27/08
摘要： A redundant resistor matching detector is provided with constant percentage threshold. The redundant resistor matching detector includes a voltage reference and a first operational amplifier, a second operational amplifier, a first potentiometer and a reference potentiometer. The first operational amplifier has a first input connected to a first potentiometer. The second operational amplifier has a first input connected to the reference potentiometer. The first operational amplifier and the second operational amplifier have a reference input coupled to the voltage reference. An input current mirror is coupled to the first potentiometer providing a first current. A first reference current mirror is coupled to the reference potentiometer providing a reference current. A second reference current mirror has an input coupled to a first output of the first reference current mirror and has a first output coupled to an output of the input current mirror. A pair of series connected resistors are connected between a second output of both the first reference current mirror and the second reference current mirror. A resistor is connected between a junction of the pair of series connected resistors and the first outputs of the input current mirror and the second reference current mirror.
摘要翻译：冗余电阻匹配检测器具有恒定百分比阈值。冗余电阻匹配检测器包括电压基准和第一运算放大器，第二运算放大器，第一电位计和参考电位计。第一运算放大器具有连接到第一电位计的第一输入端。第二运算放大器具有连接到参考电位计的第一输入。第一运算放大器和第二运算放大器具有耦合到电压基准的参考输入。输入电流镜耦合到提供第一电流的第一电位计。第一参考电流镜耦合到提供参考电流的参考电位器。第二参考电流镜具有耦合到第一参考电流镜的第一输出的输入，并且具有耦合到输入电流镜的输出的第一输出。一对串联电阻器连接在第一参考电流反射镜和第二参考电流镜之间的第二输出端上。电阻器连接在一对串联电阻器的一个连接点与输入电流镜和第二参考电流镜的第一个输出端之间。

7. 发明授权

US06941071B2 Test method and apparatus for parallel optical transceivers using serial equipment 失效
标题翻译：使用串行设备的并行光收发器的测试方法和装置
公开(公告)号：US06941071B2
公开(公告)日：2005-09-06
申请号：US09865260
申请日：2001-05-25
申请人： Kevin Paul Demsky
发明人： Kevin Paul Demsky
IPC分类号： H04B10/08 , H04B10/00
CPC分类号： H04B10/07
摘要： A test method and apparatus are provided for testing parallel optical transceivers. Each of a plurality of channels of the parallel optical transceiver is connected in series. A predefined data pattern is applied to a first channel of the series connected plurality of channels. An output is detected from a last channel of the series connected plurality of channels and compared the applied predefined data pattern to identify operation of the parallel optical transceiver. An optical wrap plug and an electrical wrap plug are used for connecting in series the plurality of channels of the parallel optical transceiver. The optical wrap plug includes a plurality of optical connectors for respectively optically connecting each respective channel transmitter to a next respective channel receiver. The electrical wrap plug includes a plurality of electrical connectors for respectively electrically connecting a respective channel receiver to a corresponding respective channel transmitter.
摘要翻译：提供了一种用于测试并行光收发器的测试方法和设备。并行光收发器的多个通道中的每一个串联连接。将预定义的数据模式应用于串联连接的多个通道的第一通道。从串联连接的多个信道的最后一个信道检测输出，并比较所应用的预定义数据模式以识别并行光收发器的操作。使用光学包装塞和电气包装塞串联连接并行光收发器的多个通道。光学覆盖塞包括多个光学连接器，用于将每个相应的通道发射器分别光学地连接到下一个相应的通道接收器。电气绕线塞包括多个电连接器，用于将相应的通道接收器分别电连接到相应的各个通道发射器。

8. 发明授权

US06515550B2 Bipolar ring oscillator with enhanced startup and shutdown 失效
公开(公告)号：US06515550B2
公开(公告)日：2003-02-04
申请号：US09852494
申请日：2001-05-10
申请人： Kevin Paul Demsky , Randolph B. Heineke
发明人： Kevin Paul Demsky , Randolph B. Heineke
IPC分类号： H03L300
CPC分类号： H03B5/06 , H03L3/00
摘要： A ring oscillator, such as a bipolar ring oscillator with enhanced, fast startup and shutdown includes a series of a plurality of inverting differential stages connected in a loop. The plurality of inverting differential stages includes a first multiplexer stage. The first multiplexer stage includes a first signal input, a second signal input and a select input. An oscillator feedback signal is applied to the first signal input of the first multiplexer stage. A startup circuit is coupled to the first multiplexer stage. The startup circuit includes a differential signal coupled to the second signal input of the first multiplexer stage for starting the bipolar ring oscillator. The startup circuit applies a full differential switching voltage signal to the second signal input of the first multiplexer stage to guarantee start of the bipolar ring oscillator after one delay of the series of the plurality of inverting differential stages connected in the loop. The startup circuit includes a fast transition run signal and a multiplexer select signal responsive to the run signal. The multiplexer select signal is coupled to the select input of the first multiplexer stage for controlling the first multiplexer stage to select the oscillator feedback signal or the static differential signal for stopping the bipolar ring oscillator.

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