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1. 发明授权

US5173449A Metallization process 失效
标题翻译：金属化过程
公开(公告)号：US5173449A
公开(公告)日：1992-12-22
申请号：US634969
申请日：1991-01-07
申请人： Kevin A. Lorenzen , Dan L. Burt , David A. Shumate
发明人： Kevin A. Lorenzen , Dan L. Burt , David A. Shumate
IPC分类号： H01L21/285 , H01L21/60 , H01L23/532
CPC分类号： H01L24/11 , H01L21/28568 , H01L23/53242 , H01L23/53247 , H01L23/53252 , H01L2224/13099 , H01L2924/01005 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19042 , H01L2924/3025 , Y10S148/02
摘要： An improved process is described for depositing TiW/TiWN/TiW/Au metallization which provides superior adhesion properties, excellent barrier properties and which is suitable for use with metal line widths of the order of one micron or smaller. It is important in order to obtain these properties to ensure that the layer immediately underlying the gold layer by substantially pure TiW deposited in a nitrogen free sputtering atmosphere. To this end, the gas supply manifolds and deposition chamber are purged and the chamber evacuated following deposition of the TiW layer and prior to deposition of the TiWN layer underlying the gold layer. A final TiW layer is also conveniently placed on top of the gold layer to act as an etching mask.
摘要翻译：描述了用于沉积TiW / TiWN / TiW / Au金属化的改进方法，其提供优异的粘合性能，优异的阻隔性能，并且适用于大约1微米或更小的金属线宽度。为了获得这些性质以确保通过在无氮溅射气氛中沉积的基本上纯的TiW，在金层下方的层是重要的。为此，气体供应歧管和沉积室被清除，并且在沉积TiW层之后并且在沉积金层下面的TiWN层之前抽空该室。最终的TiW层也方便地放置在金层的顶部上以用作蚀刻掩模。

2. 发明授权

US4495222A Metallization means and method for high temperature applications 失效
标题翻译：用于高温应用的金属化手段和方法
公开(公告)号：US4495222A
公开(公告)日：1985-01-22
申请号：US549354
申请日：1983-11-07
申请人： George F. Anderson , Dan L. Burt
发明人： George F. Anderson , Dan L. Burt
IPC分类号： H01L21/285 , H01L23/532 , H01L29/73 , H01L21/28
CPC分类号： H01L24/05 , H01L21/28512 , H01L23/53271 , H01L24/03 , H01L24/48 , H01L29/7304 , H01L2224/04042 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/48463 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/14
摘要： Semiconductor devices with resistor regions, capable of operating at higher temperatures, and having improved bond pull strength are obtained by using a single layer (e.g. Ni--Cr) to act as a combined resistive layer and barrier layer. When placed in the contact windows between the semiconductor (e.g. Si) and the interconnect metallization, (e.g. Al) and Ni--Cr layer acts as a diffusion barrier to prevent interdiffusion of silicon and aluminum and contact alloying punch-through. When placed elsewhere on the device the Ni--Cr layer also serves as thin film resistor material. Wire bond pull strength is improved by placing an adhesion layer (e.g. polysilicon) beneath the portion of the resistive barrier layer underlying the bonding pads. The polysilicon layer rests on the insulator (e.g. SiO.sub.2) covering the semiconductor substrate.
摘要翻译：通过使用单层（例如Ni-Cr）作为组合电阻层和阻挡层来获得能够在较高温度下操作并具有改善的接合拉强度的具有电阻器区域的半导体器件。当放置在半导体（例如Si）和互连金属化之间的接触窗口中时，（例如Al）和Ni-Cr层用作扩散阻挡层以防止硅和铝的相互扩散并接触合金化穿透。当放置在器件的其他地方时，Ni-Cr层也用作薄膜电阻材料。通过将粘合层（例如多晶硅）放置在接合焊盘下面的电阻势层的部分下方来提高引线接合拉伸强度。多晶硅层位于覆盖半导体衬底的绝缘体（例如SiO 2）上。

3. 发明授权

US4600658A Metallization means and method for high temperature applications 失效
标题翻译：用于高温应用的金属化手段和方法
公开(公告)号：US4600658A
公开(公告)日：1986-07-15
申请号：US652797
申请日：1984-09-20
申请人： George F. Anderson , Dan L. Burt
发明人： George F. Anderson , Dan L. Burt
IPC分类号： H01L21/285 , H01L23/532 , H01L29/73 , B32B15/00 , B32B9/06 , C25D5/10 , C25D5/26
CPC分类号： H01L29/7304 , H01L21/28512 , H01L23/53271 , H01L24/05 , H01L2224/04042 , H01L2224/48463 , H01L2924/14 , Y10S428/901 , Y10T428/12847
摘要： Semiconductor devices with resistor regions, capable of operating at higher temperatures, and having improved bond pull strength are obtained by using a single layer (e.g. Ni--Cr) to act as a combined resistive layer and barrier layer. When placed in the contact windows between the semiconductor (e.g. Si) and the interconnect metallization, (e.g. Al) the Ni--Cr layer acts as a diffusion barrier to prevent interdiffusion of silicon and aluminum and contact alloying punch-through. When placed elsewhere on the device the Ni--Cr layer also serves as thin film resistor material. Wire bond pull strength is improved by placing an adhesion layer (e.g. polysilicon) beneath the portion of the resistive barrier layer underlying the bonding pads. The polysilicon layer rests on the insulator (e.g. SiO.sub.2) covering the semiconductor substrate.
摘要翻译：通过使用单层（例如Ni-Cr）作为组合电阻层和阻挡层来获得能够在较高温度下操作并具有改善的接合拉强度的具有电阻器区域的半导体器件。当放置在半导体（例如Si）和互连金属化（例如Al）之间的接触窗口中时，（例如Al），Ni-Cr层用作扩散阻挡层，以防止硅和铝的相互扩散并接触合金化穿透。当放置在器件的其他地方时，Ni-Cr层也用作薄膜电阻材料。通过将粘合层（例如多晶硅）放置在接合焊盘下面的电阻势层的部分下方来提高引线接合拉伸强度。多晶硅层位于覆盖半导体衬底的绝缘体（例如SiO 2）上。

4. 发明授权

US3934060A Method for forming a deposited silicon dioxide layer on a semiconductor wafer 失效
标题翻译：在半导体晶片上形成沉积的二氧化硅层的方法
公开(公告)号：US3934060A
公开(公告)日：1976-01-20
申请号：US426395
申请日：1973-12-19
申请人： Dan L. Burt , Richard F. Taraci , John E. Zavion
发明人： Dan L. Burt , Richard F. Taraci , John E. Zavion
IPC分类号： C23C16/40 , H01L21/316 , C23C11/08
CPC分类号： H01L21/02164 , C23C16/402 , H01L21/02271 , H01L21/31612
摘要： The present invention is directed to a method for forming a thin silicon dioxide deposited layer on a semiconductor structure. The silicon dioxide layer is formed in a hot wall furnace typically used for diffusions. A convenient temperature is selected from those which are suitable for decomposing the TEOS source of the silicon dioxide into its constituent parts out of which the silicon dioxide layer is formed. A vacuum is used to pull the TEOS gas through the diffusion tube. Care is exercised to assure that the flow of the TEOS material through the diffusion tube is kept at a constant rate. Prior to the first use of a new TEOS source bottle, the bottle is placed in a vacuum at least low enough to complete the boiling of impurities from the source material. This predeposition vacuum step is calculated to remove all the impurities contained in the source bottle and caused by the in situ decomposition of the source material during transit and storage. Whenever the source material is allowed to stand for any period of time; i.e., overnight or any number of hours, the predeposition vacuum step removes those impurities formed during the in situ decomposition of the source material since its last use.Wafers to be coated with a deposited oxide layer are placed in a furnace boat perpendicular to the flow of the source gas. In the preferred embodiment, the wafers are spaced 200 mils apart. While there is no indentified maximum distance between wafers at which the present invention ceases to operate successfully, undesirable results occur by placing adjacent wafers closer than 100 mils while acceptable results are achieved by placing the wafers 100-200 mils apart.
摘要翻译：本发明涉及在半导体结构上形成薄二氧化硅沉积层的方法。二氧化硅层形成在通常用于扩散的热壁炉中。选择适合于将二氧化硅的TEOS源分解成其二氧化硅层形成的组成部分的温度的方便的温度。使用真空将TEOS气体拉过扩散管。注意保证通过扩散管的TEOS材料的流动保持恒定的速率。在首次使用新的TEOS源瓶之前，将瓶置于至少足够低的真空中以完成来自源材料的杂质的沸腾。计算该预沉积真空步骤以除去源瓶中所含的所有杂质，并且由在运输和储存期间源材料的原位分解引起。每当源材料被允许放置一段时间时; 即过夜或任何数小时，预沉积真空步骤除去自其最后使用以来原料分解过程中形成的杂质。

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