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    • 1. 发明授权
    • Integrated optics chip with reduced thermal errors due to pyroelectric
effects
    • 集成光学芯片,由于热电效应而具有减少的热误差
    • US6044184A
    • 2000-03-28
    • US123955
    • 1998-07-28
    • Kenneth W. ShaferHenry C. AbbinkJohn P. RahnChristine E. GeoslingGregory A. Zimmerman
    • Kenneth W. ShaferHenry C. AbbinkJohn P. RahnChristine E. GeoslingGregory A. Zimmerman
    • H01L33/00G02B6/12G02B6/30G02F1/035H01L31/0232
    • G02F1/035G02F2203/21
    • An integrated optics chip with improved performance when exposed to changing temperature is disclosed. The optic chip or integrated optics chip or MIOC has a top surface, a +Z face and -Z face. The integrated optics chip is formed from a crystal substrate having a high electro-optic coefficient such as Lithium Niobate. For the purpose of orienting the components to the optic chip to be described, the +Z crystal axis extends outward from the +Z face, the Z axis being the axis across which a pyroelectric effect is exhibited. The top surface is orthogonal to the Z axis. An input waveguide on the top surface receives an optical signal from an input port, passes the signal via a waveguide network, to an output waveguide coupling the waveguide network to an output port. A portion of the +Z and -Z faces are coated at least partially with a conductive coating. A conductive path couples the +Z and -Z faces to prevent a charge differential from developing between the +Z and -Z faces due to a change in temperature of the optic chip and the pyroelectric effect.
    • 公开了当暴露于变化的温度时具有改进的性能的集成光学芯片。 光学芯片或集成光学芯片或MIOC具有顶面,+ Z面和-Z面。 集成光学芯片由具有高电光系数的晶体衬底形成,例如铌酸锂。 为了将元件定向到要描述的光学芯片,+ Z晶体轴从+ Z面向外延伸,Z轴是表示热电效应的轴。 顶面与Z轴正交。 顶表面上的输入波导接收来自输入端口的光信号,将信号经由波导网络传递到将波导网络耦合到输出端口的输出波导。 至少部分地用导电涂层涂覆一部分+ Z和-Z面。 导电路径耦合+ Z和-Z面,以防止由于光学芯片的温度变化和热电效应而在+ Z和-Z面之间产生电荷差异。
    • 2. 发明授权
    • Dual purpose input electrode structure for MIOCs (multi-function
integrated optics chips)
    • 用于MIOC的双用途输入电极结构(多功能集成光学芯片)
    • US6128424A
    • 2000-10-03
    • US124457
    • 1998-07-28
    • Lorrie L. GamppGregory A. ZimmermanChristine E. GeoslingJohn P. Rahn
    • Lorrie L. GamppGregory A. ZimmermanChristine E. GeoslingJohn P. Rahn
    • G02B6/12G02F1/035G02F1/313
    • G02F1/3137G02F1/035G02F2203/21
    • An Integrated Optics Chip with improved performance when exposed to rapidly changing temperature is disclosed. The optic chip or integrated optic chip or MIOC has a top surface, a +Z face and -Z face. The chip is formed from a crystal having a high electro-optic coefficient such as Lithium Niobate. For the purpose of orienting the components to the optic chip to be described, the +Z crystal axis extends outward from the +Z face. An input waveguide formed in the top surface of the chip and orthogonal to the +Z axis receives an optical signal from an input port, passes the signal via a waveguide network, to an output waveguide coupling the waveguide network to an output port. Metalization is applied to the top face of the optic chip to form at least a first and a second rail. The first and second rails are positioned to very closely straddle a portion of the input waveguide. A conductive bridge connects the first and second rails to prevent a charge differential from developing between the first and second rails.
    • 公开了当暴露于快速变化的温度时具有改进的性能的集成光学芯片。 光学芯片或集成光学芯片或MIOC具有顶面,+ Z面和-Z面。 芯片由具有高电光系数的晶体形成,例如铌酸锂。 为了将组件定向到要描述的光学芯片,+ Z晶体轴从+ Z面向外延伸。 形成在芯片的顶表面并与+ Z轴正交的输入波导接收来自输入端口的光信号,将信号经由波导网络传递到将波导网络耦合到输出端口的输出波导。 将金属化施加到光学芯片的顶面以形成至少第一和第二导轨。 第一和第二轨道定位成非常紧密地跨越输入波导的一部分。 导电桥连接第一和第二导轨,以防止电荷差异在第一和第二导轨之间形成。
    • 7. 发明授权
    • Multifunction integrated optics chip having improved polarization extinction ratio
    • 具有改善的偏振消光比的多功能集成光学芯片
    • US06351575B1
    • 2002-02-26
    • US09469665
    • 1999-12-23
    • Lorrie L. GamppGregory ZimmermanArthur R. MartinezThomas M. FlahertyChristine E. Geosling
    • Lorrie L. GamppGregory ZimmermanArthur R. MartinezThomas M. FlahertyChristine E. Geosling
    • G02B612
    • G02B6/126G02B6/122
    • An integrated optics chip includes an optical waveguide network formed on a surface of an electrooptically active material. The optical waveguide network has an input facet where an optical signal may be input to the optical waveguide network and an output facet where optical signals may be output from the optical waveguide network. One or more trenches is formed in the bottom surface of the surface and arranged to extend into the substrate toward the optical waveguide network to a depth of at least 70% of the thickness. The trenches prevent light rays incident thereon from inside the substrate from propagating to the output facet. In particular, the trenches prevent light scattered at the input facet or from scattering centers in the optical waveguide network from reflecting from the bottom surface of the substrate to the output facet. A cover may be mounted to the top surface of the substrate to provide structural strength to the integrated optics chip. The cover preferably extends substantially the entire length of the substrate. One or more side grooves may be formed in the sides of the substrate and cover. A light absorbing material may be placed in the trenches and grooves. An electrode pattern may be formed on the top surface of the substrate adjacent the optical waveguide network, and a plurality of access electrodes may be formed on sides of the substrate and cover to provide electrical signals to the electrodes.
    • 集成光学芯片包括形成在电光活性材料的表面上的光波导网络。 光波导网络具有可以将光信号输入到光波导网络的输入小面和可以从光波导网络输出光信号的输出小面。 一个或多个沟槽形成在表面的底表面中,并布置成朝向光波导网络延伸到衬底的至少70%厚度的深度。 沟槽防止从衬底内部入射到其上的光线传播到输出小面。 特别地,沟槽防止在输入小面处散射的光或光波导网络中的散射中心从基板的底表面反射到输出小面。 盖可以安装到基板的顶表面以向集成光学芯片提供结构强度。 盖优选地基本上延伸到基板的整个长度上。 可以在基板和盖的侧面中形成一个或多个侧槽。 光吸收材料可以放置在沟槽和沟槽中。 可以在邻近光波导网络的基板的顶表面上形成电极图案,并且可以在基板和盖的侧面上形成多个接入电极,以向电极提供电信号。