会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明申请
    • MEMORY DEVICE
    • 内存设备
    • US20080046605A1
    • 2008-02-21
    • US11780057
    • 2007-07-19
    • Gen SASAKIMasahiro MORIYAMA
    • Gen SASAKIMasahiro MORIYAMA
    • G06F13/28
    • G06F13/1663
    • In a memory device, data can be transmitted from a first CPU to a second CPU via an individual register or a shared SRAM, for example. The data transmitted from the first CPU to the second CPU via the individual register also passes through a FIFO. When first data is transmitted via the shared SRAM and then second data is transmitted via the individual register, for example, and if the first data transmission is adjusted by a SRAM controller and put into a waiting state at the FIFO, the second data transmitted via the individual register also passes through the FIFO, preventing the second data transmission from being completed earlier than the first data transmission. The data transmissions can therefore be completed appropriately. This in turn increases reliability of the memory device.
    • 在存储器装置中,例如可以通过单个寄存器或共享SRAM从第一CPU向第二CPU发送数据。 从第一CPU向第二CPU经由个别寄存器发送的数据也通过FIFO。 当通过共享SRAM发送第一数据,然后例如经由各个寄存器发送第二数据时,如果由SRAM控制器调整第一数据传输并在FIFO处于等待状态,则经由 单个寄存器也通过FIFO,从而防止在第一数据传输之前完成第二数据传输。 因此,可以适当地完成数据传输。 这又增加了存储器件的可靠性。