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1. 发明申请

US20140232467A1 HIGH-FREQUENCY AMPLIFIER MODULE AND HIGH-FREQUENCY AMPLIFIER MODULE UNIT 审中-公开
标题翻译：高频放大器模块和高频放大器模块
公开(公告)号：US20140232467A1
公开(公告)日：2014-08-21
申请号：US14237776
申请日：2012-08-24
申请人： Kenji Mukai , Kenichi Horiguchi , Morishige Hieda , Katsuya Kato , Yoshihito Hirano , Kazuya Yamamoto , Hiroyuki Joba , Teruyuki Shimura
发明人： Kenji Mukai , Kenichi Horiguchi , Morishige Hieda , Katsuya Kato , Yoshihito Hirano , Kazuya Yamamoto , Hiroyuki Joba , Teruyuki Shimura
IPC分类号： H03F3/195
CPC分类号： H03F3/195 , H03F1/0277 , H03F3/211 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/255 , H03F2200/423 , H03F2200/451 , H03F2203/7206 , H03F2203/7209
摘要： A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1, and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7. The driver-stage amplifier 3 is fabricated on a silicon substrate 11, while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.
摘要翻译：高频放大器模块包括：放大从RF输入端子1输入的RF信号的驱动级放大器3和放大由驱动级放大器3放大的信号的末级放大器5，并输出信号在放大到RF输出端子7之后。驱动级放大器3制造在硅衬底11上，而最后级放大器5制造在砷化镓衬底上。这种结构使成本降低，同时保持与在砷化镓基板71上制造整个模块的所有部件的情况相当的高频特性。

2. 发明授权

US07145397B2 Output overvoltage protection circuit for power amplifier 有权
标题翻译：功率放大器输出过压保护电路
公开(公告)号：US07145397B2
公开(公告)日：2006-12-05
申请号：US10889059
申请日：2004-07-13
申请人： Kazuya Yamamoto , Teruyuki Shimura , Tomoyuki Asada , Satoshi Suzuki
发明人： Kazuya Yamamoto , Teruyuki Shimura , Tomoyuki Asada , Satoshi Suzuki
IPC分类号： H03F1/52
CPC分类号： H03F1/52
摘要： Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.
摘要翻译：公开了一种用于具有多级的功率放大器的输出过电压保护电路，其包括监视电路，用于监视功率放大器的最后级中的输出晶体管的输出过电压，并且允许电流响应于监控的输出过电压，以及电流镜电路，用于提供与来自监视器电路的电流成比例的电流，使得功率放大器的第一级晶体管的基极偏置响应于从电流提供的电流而减小镜像电路，以减少最终级输出晶体管的输出。

3. 发明授权

US07605648B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US07605648B2
公开(公告)日：2009-10-20
申请号：US11947831
申请日：2007-11-30
申请人： Kazuya Yamamoto , Satoshi Suzuki , Tomoyuki Asada , Takayuki Matsuzuka , Teruyuki Shimura
发明人： Kazuya Yamamoto , Satoshi Suzuki , Tomoyuki Asada , Takayuki Matsuzuka , Teruyuki Shimura
IPC分类号： H03F1/14
CPC分类号： H03F1/0277 , H03F1/0261 , H03F1/30 , H03F3/195 , H03F2200/411 , H03F2200/451
摘要： A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 μm. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 μm.
摘要翻译：根据本发明的功率放大器通过切换主功率放大器和辅助功率放大器来操作。辅助功率放大器的空闲电流小于主功率放大器的空闲电流。每个主功率放大器和辅助功率放大器具有用于放大RF信号的前置放大元件，用于放大来自前一放大元件的输出信号的后一放大元件，用于驱动前一放大元件的前一偏置电路，以及后一偏置电路分别用于驱动后面的放大元件。主功率放大器的后一放大元件与辅助功率放大器的后一放大元件之间的间隔不大于100um。主功率放大器的后一个放大元件与辅助功率放大器的后一个偏置电路之间的间隔不小于200μm。

4. 发明申请

US20090027130A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20090027130A1
公开(公告)日：2009-01-29
申请号：US11947831
申请日：2007-11-30
申请人： Kazuya Yamamoto , Satoshi Suzuki , Tomoyuki Asada , Takayuki Matsuzuka , Teruyuki Shimura
发明人： Kazuya Yamamoto , Satoshi Suzuki , Tomoyuki Asada , Takayuki Matsuzuka , Teruyuki Shimura
IPC分类号： H03F3/68 , H03F1/14
CPC分类号： H03F1/0277 , H03F1/0261 , H03F1/30 , H03F3/195 , H03F2200/411 , H03F2200/451
摘要： A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 μm. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 μm.
摘要翻译：根据本发明的功率放大器通过切换主功率放大器和辅助功率放大器来操作。辅助功率放大器的空闲电流小于主功率放大器的空闲电流。每个主功率放大器和辅助功率放大器具有用于放大RF信号的前置放大元件，用于放大来自前一放大元件的输出信号的后一放大元件，用于驱动前一放大元件的前一偏置电路，以及后一偏置电路分别用于驱动后面的放大元件。主功率放大器的后一放大元件与辅助功率放大器的后一放大元件之间的间隔不大于100um。主功率放大器的后一个放大元件与辅助功率放大器的后一个偏置电路之间的间隔不小于200μm。

5. 发明申请

US20050030106A1 Output overvoltage protection circuit for power amplifier 有权
标题翻译：功率放大器输出过压保护电路
公开(公告)号：US20050030106A1
公开(公告)日：2005-02-10
申请号：US10889059
申请日：2004-07-13
申请人： Kazuya Yamamoto , Teruyuki Shimura , Tomoyuki Asada , Satoshi Suzuki
发明人： Kazuya Yamamoto , Teruyuki Shimura , Tomoyuki Asada , Satoshi Suzuki
IPC分类号： H03F1/52 , H03F3/21
CPC分类号： H03F1/52
摘要： Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.
摘要翻译：公开了一种用于具有多级的功率放大器的输出过电压保护电路，其包括监视电路，用于监视功率放大器的最后级中的输出晶体管的输出过电压，并且允许电流响应于监控的输出过电压，以及电流镜电路，用于提供与来自监视器电路的电流成比例的电流，使得功率放大器的第一级晶体管的基极偏置响应于从电流提供的电流而减小镜像电路，以减少最终级输出晶体管的输出。

6. 发明授权

US06861906B2 High-frequency semiconductor device 有权
标题翻译：高频半导体器件
公开(公告)号：US06861906B2
公开(公告)日：2005-03-01
申请号：US10204446
申请日：2001-05-11
申请人： Kazutomi Mori , Shintaro Shinjo , Kousei Maemura , Teruyuki Shimura , Kazuhiko Nakahara , Tadashi Takagi
发明人： Kazutomi Mori , Shintaro Shinjo , Kousei Maemura , Teruyuki Shimura , Kazuhiko Nakahara , Tadashi Takagi
IPC分类号： H01L27/06 , H03F3/19 , H03F3/21 , H03F3/68
CPC分类号： H01L27/0605 , H03F3/19 , H03F3/211 , H03F2203/21178
摘要： A high-frequency semiconductor device according to the present invention achieves improvements in degradation of noise characteristics and a reduction in gain, and an improvement in reduction in power efficiency while suppressing a concentration of a current to multifinger HBTs. In the multifinger HBTs constituting a first stage and an output stage of an amplifier 10, basic HBTs 14 that constitute the multifinger HBT 12 corresponding to the first stage, are each made up of an HBT 14a and an emitter resistor 14b connected to the corresponding emitter of the HBT 14a, whereas basic HBTs 18 that constitute the multifinger HBT 16 corresponding to the output stage, are each comprised of an HBT 18a and a base resistor 18c connected to the corresponding base of the HBT 18a. The high-frequency semiconductor device according to the present invention is useful as a high output power amplifier used in satellite communications, ground microwave communications, mobile communications, etc.
摘要翻译：根据本发明的高频半导体器件实现了噪声特性的降低和增益的降低的改善，并且在抑制电流到多焦HBT的浓度的同时，提高了功率效率的降低。在构成放大器10的第一级和输出级的多画面HBT中，构成对应于第一级的多画面HBT 12的基本HBT 14分别由连接到相应发射极的HBT 14a和发射极电阻14b组成而构成与输出级相对应的多功能HBT16的基本HBT 18分别由连接到HBT 18a的相应基座的HBT 18a和基极电阻18c组成。根据本发明的高频半导体器件可用作卫星通信，地面微波通信，移动通信等中使用的高输出功率放大器。

7. 发明授权

US5973543A Bias circuit for bipolar transistor 失效
标题翻译：双极晶体管的偏置电路
公开(公告)号：US5973543A
公开(公告)日：1999-10-26
申请号：US825220
申请日：1997-03-27
申请人： Teruyuki Shimura
发明人： Teruyuki Shimura
IPC分类号： H03F3/20 , G05F3/22 , H03F3/04 , G05F1/10
CPC分类号： G05F3/22
摘要： A bias circuit for a bipolar transistor includes a constant voltage source connected to a base electrode of the bipolar transistor; and a resistor connected in series between the constant voltage source and the base electrode of the bipolar transistor. By selecting an appropriate resistance for this resistor, the bias point moves due to a change in the voltage drop across the resistor. The change occurs because the base current flowing through the resistor changes, whereby the operating class of the transistor changes, resulting in a high efficiency at a desired output power.
摘要翻译：用于双极晶体管的偏置电路包括连接到双极晶体管的基极的恒压源; 以及串联连接在双极晶体管的恒定电压源和基极之间的电阻器。通过为该电阻选择合适的电阻，偏置点由于电阻上的电压降的变化而移动。发生这种变化是因为流过电阻的基极电流发生变化，晶体管的工作类别发生变化，导致所需输出功率的效率高。

8. 发明授权

US4977100A Method of fabricating a MESFET 失效
标题翻译：制造MESFET的方法
公开(公告)号：US4977100A
公开(公告)日：1990-12-11
申请号：US417288
申请日：1989-10-05
申请人： Teruyuki Shimura
发明人： Teruyuki Shimura
IPC分类号： H01L29/812 , H01L21/285 , H01L21/338 , H01L29/417 , H01L29/423
CPC分类号： H01L29/66878 , H01L21/28587 , H01L29/42316
摘要： A method of producing a MESFET which includes forming a refractory metal gate structure on an active layer formed in or on a semiconductor substrate. Source and drain regions optionally with extensions, are formed adjacent the gate structure. An insulating film is deposited over the partly formed structure to form a film portion on the semiconductor substrate which is separated from further film portions formed over the source and drain regions. A flattening resist is deposited over the insulating film and etched to expose only the film portion on the gate structure, while the gate structure itself and the resist protects the film portions on the source and drain regions. The film portion over the gate structure can thus be removed without damage to the gate structure or the remainder of the insulating film. The process produces with increased yield and more consistent properties in that the danger of attacking the refractory metal gate structure during operations succeeding its formation is significantly reduced.
摘要翻译：一种MESFET的制造方法，其特征在于，在形成于半导体基板中的有源层上形成难熔金属栅极结构。源极和漏极区域可选地具有延伸部分，邻近栅极结构形成。在部分形成的结构上沉积绝缘膜，以在半导体衬底上形成薄膜部分，其与形成在源区和漏区上的其它膜部分分离。平坦化抗蚀剂沉积在绝缘膜上并被蚀刻以仅暴露栅极结构上的膜部分，而栅极结构本身和抗蚀剂保护源极和漏极区域上的膜部分。因此，能够去除栅极结构上的膜部分，而不会损坏栅极结构或绝缘膜的其余部分。该方法产生具有增加的产量和更一致的性质，因为在其形成过程中的操作期间攻击难熔金属栅极结构的危险性显着降低。

9. 发明授权

US6081003A Heterojunction bipolar transistor with ballast resistor 失效
标题翻译：具有镇流电阻的异质结双极晶体管
公开(公告)号：US6081003A
公开(公告)日：2000-06-27
申请号：US985364
申请日：1997-12-04
申请人： Shinichi Miyakuni , Teruyuki Shimura
发明人： Shinichi Miyakuni , Teruyuki Shimura
IPC分类号： H01L29/73 , H01L21/302 , H01L21/3065 , H01L21/331 , H01L29/08 , H01L29/205 , H01L29/737 , H01L31/072 , H01L31/0328 , H01L31/0336 , H01L31/109
CPC分类号： H01L29/66318 , H01L29/0817 , H01L29/7371
摘要： A heterojunction bipolar transistor is provided with a ballast resistor layer in an emitter layer which prevents the current amplification factor .beta. from decreasing. The n-GaAs carrier supply layer having a specified carrier concentration is formed between the ballast resistor layer and the n-AlGaAs layer.
摘要翻译：异质结双极晶体管在发射极层中设置有镇流电阻层，防止电流放大因子β降低。在镇流电阻层和n-AlGaAs层之间形成具有规定载流子浓度的n-GaAs载流子供给层。

10. 发明授权

US5192700A Method of making field effect transistor 失效
标题翻译：制作场效应晶体管的方法
公开(公告)号：US5192700A
公开(公告)日：1993-03-09
申请号：US828374
申请日：1992-01-30
申请人： Teruyuki Shimura
发明人： Teruyuki Shimura
IPC分类号： H01L21/265 , H01L21/337 , H01L21/338 , H01L21/76 , H01L27/095 , H01L29/778 , H01L29/80 , H01L29/808 , H01L29/812
CPC分类号： H01L29/66924 , H01L21/7605 , H01L29/802 , H01L29/808
摘要： A field effect transistor including a semi-insulating semiconductor substrate, a first conductivity type semiconductor layer disposed on the substrate and forming a heterojunction with the substrate, second conductivity type spaced apart source and drain regions extending through the layer into the substrate, a metallic gate disposed on the layer between the source and drain regions, and a second conductivity type channel disposed in the substrate extending between the source and drain regions and forming a pn heterojunction with the layer for reducing leakage current from the channel to the gate. The second conductivity type channel is produced by ion implantation, and the implantation conditions are controlled as a mechanism for controllably establishing a threshold voltage for the field effect transistor.
摘要翻译：一种场效应晶体管，包括半绝缘半导体衬底，设置在衬底上并与衬底形成异质结的第一导电类型半导体层，延伸穿过衬底的第二导电类型间隔开的源极和漏极区，金属栅极设置在源极和漏极区域之间的层上，以及第二导电类型沟道，设置在衬底中，在源极和漏极区域之间延伸，并且与该层形成pn异质结，以减少从沟道到栅极的泄漏电流。通过离子注入产生第二导电类型沟道，并且将注入条件作为用于可控地建立场效应晶体管的阈值电压的机制来控制。

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