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1. 发明授权

US06509593B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06509593B2
公开(公告)日：2003-01-21
申请号：US09750069
申请日：2000-12-29
申请人： Kenichi Inoue , Yoshinori Obata , Takeyasu Saito , Kaoru Saigoh , Naoya Sashida , Koji Tani , Jirou Miura , Tatsuya Yokota , Satoru Mihara , Yukinobu Hikosaka , Yasutaka Ozaki
发明人： Kenichi Inoue , Yoshinori Obata , Takeyasu Saito , Kaoru Saigoh , Naoya Sashida , Koji Tani , Jirou Miura , Tatsuya Yokota , Satoru Mihara , Yukinobu Hikosaka , Yasutaka Ozaki
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L21/76802 , H01L21/7682 , H01L21/76829 , H01L27/11507 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.
摘要翻译：通过在绝缘膜上形成接触孔而形成的半导体器件，其通过相同的步骤在电容器的下电极上覆盖MOSFET的源极/漏极和存储单元区域中的电容器，然后将插头填充到触点中孔，然后在电容器的上电极上形成接触孔。因此，可以提供具有铁电电容器的半导体器件，其能够通过抑制在晶体管上形成的电容器的损坏来简化与电容器的上部电极和下部电极的各个布线连接结构。

2. 发明授权

US06913970B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06913970B2
公开(公告)日：2005-07-05
申请号：US10303752
申请日：2002-11-26
申请人： Kenichi Inoue , Yoshinori Obata , Takeyasu Saito , Kaoru Saigoh , Naoya Sashida , Koji Tani , Jirou Miura , Tatsuya Yokota , Satoru Mihara , Yukinobu Hikosaka , Yasutaka Ozaki
发明人： Kenichi Inoue , Yoshinori Obata , Takeyasu Saito , Kaoru Saigoh , Naoya Sashida , Koji Tani , Jirou Miura , Tatsuya Yokota , Satoru Mihara , Yukinobu Hikosaka , Yasutaka Ozaki
IPC分类号： H01L23/522 , H01L21/02 , H01L21/768 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L27/115 , H01L21/20
CPC分类号： H01L27/11502 , H01L21/76802 , H01L21/7682 , H01L21/76829 , H01L27/11507 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.
摘要翻译：通过在绝缘膜上形成接触孔而形成的半导体器件，其通过相同的步骤在电容器的下电极上覆盖MOSFET的源/漏和存储单元区域中的电容器，然后将插头填充到接触孔，然后在电容器的上电极上形成接触孔。因此，可以提供具有铁电电容器的半导体器件，其能够通过抑制在晶体管上形成的电容器的损坏来简化与电容器的上部电极和下部电极的各个布线连接结构。

3. 发明授权

US06570203B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US06570203B2
公开(公告)日：2003-05-27
申请号：US09819738
申请日：2001-03-29
申请人： Yukinobu Hikosaka , Yasutaka Ozaki , Kazuaki Takai
发明人： Yukinobu Hikosaka , Yasutaka Ozaki , Kazuaki Takai
IPC分类号： H01L31119
CPC分类号： H01L27/11502 , H01L27/10811 , H01L27/10894 , H01L27/11507 , H01L28/55
摘要： There is provided a semiconductor device which comprises a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.

4. 发明授权

US06706540B2 Method of manufacturing a semiconductor device with a hydrogen barrier layer 有权
标题翻译：制造具有氢阻挡层的半导体器件的方法
公开(公告)号：US06706540B2
公开(公告)日：2004-03-16
申请号：US10361585
申请日：2003-02-11
申请人： Yukinobu Hikosaka , Yasutaka Ozaki , Kazuaki Takai
发明人： Yukinobu Hikosaka , Yasutaka Ozaki , Kazuaki Takai
IPC分类号： H01L2100
CPC分类号： H01L27/11502 , H01L27/10811 , H01L27/10894 , H01L27/11507 , H01L28/55
摘要： There is provided a semiconductor device which includes a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.
摘要翻译：提供一种半导体器件，其包括具有下电极，电介质膜和上电极的电容器，形成在电容器上的第一保护膜，形成在第一保护膜上的第一布线，形成在第一保护膜上的第一绝缘膜第一布线，形成在第一绝缘膜上的第二布线，形成在第二布线上的第二绝缘膜，以及形成在第一绝缘膜和第一布线之间的至少一个覆盖至少电容器的第二保护膜，以及第三保护膜形成在第二绝缘膜上以覆盖电容器并设定为地电位。因此，可以抑制在多层布线结构下形成的铁电电容器的劣化。

5. 发明授权

US07598557B2 Semiconductor device and method for fabricating a semicondutor device including first and second hydrogen diffusion preventing films 有权
标题翻译：半导体装置及其制造方法，该半导体装置包括第一和第二氢扩散防止膜
公开(公告)号：US07598557B2
公开(公告)日：2009-10-06
申请号：US11051643
申请日：2005-01-27
申请人： Kouichi Nagai , Hideaki Kikuchi , Naoya Sashida , Yasutaka Ozaki
发明人： Kouichi Nagai , Hideaki Kikuchi , Naoya Sashida , Yasutaka Ozaki
IPC分类号： H01L27/108
CPC分类号： H01L27/11502 , H01L21/02063 , H01L27/0688 , H01L27/11585 , H01L27/1159 , H01L28/57
摘要： The semiconductor device comprises a first insulation film 26 formed over a semiconductor substrate 10, first conductor plug 32 buried in a first contact hole 28a formed down to a source/drain diffused layer 22, a capacitor 44 formed over the first insulation film 26, a first hydrogen diffusion preventing film 48 formed over the first insulation film 26, covering the capacitor 44, a second insulation film 50 formed over the first hydrogen diffusion preventing film and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the first hydrogen diffusion preventing film 26 and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the second insulation film 50, second conductor plug 62 buried in a second contact hole 56 formed down to the lower electrode 38 or the upper electrode 42 of the capacitor 44, a third conductor plug 62 buried in a third contact hole 58 formed down to the first conductor plug 32, and an interconnection 64 connected to the second conductor plug 62 or the third conductor plug 62.
摘要翻译：半导体器件包括形成在半导体衬底10上的第一绝缘膜26，埋在第一接触孔28a中的第一导体插塞32，第一接触孔28a形成在源极/漏极扩散层22上，形成在第一绝缘膜26上的电容器44 在第一绝缘膜26上形成的覆盖电容器44的第一氢扩散防止膜48，形成在第一氢扩散防止膜上并具有表面平坦化的第二绝缘膜50，形成在第一氢上的第二氢扩散防止膜52 具有表面平坦化的扩散防止膜26，形成在第二绝缘膜50上的第二氢扩散防止膜52，埋在第二接触孔56中的第二导体插塞62，第二接触孔56形成在下电极38或下电极38的上电极42 电容器44，埋在第一接触孔58中的第三导体插头62，并形成在第一导体插塞32的下方连接到第二导体插头62或第三导体插头62的部分64。

6. 发明申请

US20090278231A1 Semiconductor device and method for fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090278231A1
公开(公告)日：2009-11-12
申请号：US12458496
申请日：2009-07-14
申请人： Kouichi Nagai , Hideaki Kikuchi , Naoya Sashida , Yasutaka Ozaki
发明人： Kouichi Nagai , Hideaki Kikuchi , Naoya Sashida , Yasutaka Ozaki
IPC分类号： H01L29/92 , H01L21/02
CPC分类号： H01L27/11502 , H01L21/02063 , H01L27/0688 , H01L27/11585 , H01L27/1159 , H01L28/57
摘要： The semiconductor device comprises a first insulation film 26 formed over a semiconductor substrate 10, first conductor plug 32 buried in a first contact hole 28a formed down to a source/drain diffused layer 22, a capacitor 44 formed over the first insulation film 26, a first hydrogen diffusion preventing film 48 formed over the first insulation film 26, covering the capacitor 44, a second insulation film 50 formed over the first hydrogen diffusion preventing film and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the first hydrogen diffusion preventing film 26 and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the second insulation film 50, second conductor plug 62 buried in a second contact hole 56 formed down to the lower electrode 38 or the upper electrode 42 of the capacitor 44, a third conductor plug 62 buried in a third contact hole 58 formed down to the first conductor plug 32, and an interconnection 64 connected to the second conductor plug 62 or the third conductor plug 62.
摘要翻译：半导体器件包括形成在半导体衬底10上的第一绝缘膜26，埋在第一接触孔28a中的第一导体插塞32，第一接触孔28a形成在源极/漏极扩散层22上，形成在第一绝缘膜26上的电容器44 在第一绝缘膜26上形成的覆盖电容器44的第一氢扩散防止膜48，形成在第一氢扩散防止膜上并具有表面平坦化的第二绝缘膜50，形成在第一氢上的第二氢扩散防止膜52 具有表面平坦化的扩散防止膜26，形成在第二绝缘膜50上的第二氢扩散防止膜52，埋在第二接触孔56中的第二导体插塞62，第二接触孔56形成在下电极38或下电极38的上电极42 电容器44，埋在第一接触孔58中的第三导体插头62，并形成在第一导体插塞32的下方连接到第二导体插头62或第三导体插头62的部分64。

7. 发明申请

US20050285173A1 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050285173A1
公开(公告)日：2005-12-29
申请号：US11051643
申请日：2005-01-27
申请人： Kouichi Nagai , Hideaki Kikuchi , Naoya Sashida , Yasutaka Ozaki
发明人： Kouichi Nagai , Hideaki Kikuchi , Naoya Sashida , Yasutaka Ozaki
IPC分类号： H01L21/02 , H01L21/31 , H01L21/469 , H01L21/8234 , H01L21/8242 , H01L21/8244 , H01L21/8246 , H01L23/48 , H01L23/52 , H01L27/06 , H01L27/108 , H01L27/115 , H01L29/40 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/11502 , H01L21/02063 , H01L27/0688 , H01L27/11585 , H01L27/1159 , H01L28/57
摘要： The semiconductor device comprises a first insulation film 26 formed over a semiconductor substrate 10, first conductor plug 32 buried in a first contact hole 28a formed down to a source/drain diffused layer 22, a capacitor 44 formed over the first insulation film 26, a first hydrogen diffusion preventing film 48 formed over the first insulation film 26, covering the capacitor 44, a second insulation film 50 formed over the first hydrogen diffusion preventing film and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the first hydrogen diffusion preventing film 26 and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the second insulation film 50, second conductor plug 62 buried in a second contact hole 56 formed down to the lower electrode 38 or the upper electrode 42 of the capacitor 44, a third conductor plug 62 buried in a third contact hole 58 formed down to the first conductor plug 32, and an interconnection 64 connected to the second conductor plug 62 or the third conductor plug 62.
摘要翻译：半导体器件包括形成在半导体衬底10上的第一绝缘膜26，埋在第一接触孔28a中的第一导体插塞32，其形成在源极/漏极扩散层22上，形成在第一绝缘膜26上的电容器44，形成在第一绝缘膜26上的覆盖电容器44的第一氢扩散防止膜48，形成在第一氢扩散防止膜上并具有表面平坦化的第二绝缘膜50，形成在第一绝缘膜52上的第二防止氢扩散膜52 表面被平坦化的氢扩散防止膜26，形成在第二绝缘膜50上的第二氢扩散防止膜52，埋在第二接触孔56中的第二导体插塞62，第二接触孔56形成在下电极38或上电极42 电容器44，埋在第一接线孔58中的第三导体插头62，并形成在第一导体插头32上连接64连接到第二导体插头62或第三导体插头62。

8. 发明授权

US07297558B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07297558B2
公开(公告)日：2007-11-20
申请号：US11106580
申请日：2005-04-15
申请人： Yasutaka Ozaki , Tatsuya Yokota , Nobutaka Ohyagi
发明人： Yasutaka Ozaki , Tatsuya Yokota , Nobutaka Ohyagi
IPC分类号： H01L21/00
CPC分类号： H01L27/11502 , H01L21/0214 , H01L21/0217 , H01L21/022 , H01L21/3144 , H01L21/76829 , H01L21/76834 , H01L27/11507
摘要： A W plug (24) is formed and a W oxidation preventing barrier metal film (25) is formed thereon. After that, an SiON film (27) thinner than the W oxidation preventing barrier metal film (25) is formed and Ar sputter etching is performed on the SiON film (27). As a result, the shape of the surface of the SiON film (27) becomes gentler and deep trenches disappear. Next, an SiON film (28) is formed on the whole surface. A voidless W oxidation preventing insulating film (29) is composed of the SiON (28) film and the SiON film (27).
摘要翻译：形成W插头（24），并在其上形成W氧化防止阻挡金属膜（25）。之后，形成比W氧化防止阻挡金属膜（25）薄的SiON膜（27），对SiON膜（27）进行Ar溅射蚀刻。结果，SiON膜（27）的表面的形状变得较平缓，深的沟槽消失。接下来，在整个表面上形成SiON膜（28）。无孔W氧化防止绝缘膜（29）由SiON（28）膜和SiON膜（27）构成。

9. 发明申请

US20050181605A1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20050181605A1
公开(公告)日：2005-08-18
申请号：US11106580
申请日：2005-04-15
申请人： Yasutaka Ozaki , Tatsuya Yokota , Nobutaka Ohyagi
发明人： Yasutaka Ozaki , Tatsuya Yokota , Nobutaka Ohyagi
IPC分类号： H01L21/20 , H01L21/314 , H01L21/768 , H01L21/8246 , H01L27/115
CPC分类号： H01L27/11502 , H01L21/0214 , H01L21/0217 , H01L21/022 , H01L21/3144 , H01L21/76829 , H01L21/76834 , H01L27/11507
摘要： A W plug (24) is formed and a W oxidation preventing barrier metal film (25) is formed thereon. After that, an SiON film (27) thinner than the W oxidation preventing barrier metal film (25) is formed and Ar sputter etching is performed on the SiON film (27). As a result, the shape of the surface of the SiON film (27) becomes gentler and deep trenches disappear. Next, an SiON film (28) is formed on the whole surface. A voidless W oxidation preventing insulating film (29) is composed of the SiON (28) film and the SiON film (27).
摘要翻译：形成W插头（24），并在其上形成W氧化防止阻挡金属膜（25）。之后，形成比W氧化防止阻挡金属膜（25）薄的SiON膜（27），对SiON膜（27）进行Ar溅射蚀刻。结果，SiON膜（27）的表面的形状变得较平缓，深的沟槽消失。接下来，在整个表面上形成SiON膜（28）。无孔W氧化防止绝缘膜（29）由SiON（28）膜和SiON膜（27）构成。

10. 发明授权

US07679202B2 Semiconductor device having symbol pattern utilized as identification sign 有权
标题翻译：具有用作识别符号的符号图案的半导体器件
公开(公告)号：US07679202B2
公开(公告)日：2010-03-16
申请号：US11790123
申请日：2007-04-24
申请人： Shigeki Yoshida , Fumio Ushida , Nobuhisa Naori , Yasutaka Ozaki
发明人： Shigeki Yoshida , Fumio Ushida , Nobuhisa Naori , Yasutaka Ozaki
IPC分类号： H01L23/544 , H01L21/304 , H01L21/76
CPC分类号： H01L23/544 , H01L23/585 , H01L2223/54406 , H01L2223/54433 , H01L2223/5446 , H01L2223/5448 , H01L2924/0002 , H01L2924/00
摘要： A plurality of device patterns constituting part of an electronic circuit are formed over the surface of a substrate. A symbol pattern to be used for an identification sign is formed in the same layer as the device patterns. A width of the device pattern is within a pattern width range on a design rule. The symbol pattern is formed by a plurality of isolated element patterns. The element pattern is either a linear pattern or a dot pattern. A width of the element pattern is equal to or larger than 0.8 time a lower limit value of the pattern width range and equal to or smaller than 1.2 times an upper limit value of the pattern width range.
摘要翻译：构成电子电路的一部分的多个器件图案形成在衬底的表面上。用于识别符号的符号图案形成在与设备图案相同的层中。设备图案的宽度在设计规则的图案宽度范围内。符号图案由多个隔离元件图案形成。元素图案是线性图案或点图案。元件图案的宽度等于或大于图案宽度范围的下限值的0.8倍，并且等于或小于图案宽度范围的上限值的1.2倍。

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