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1. 发明授权

US5522060A Multiprocessor memory managing system and method for executing sequentially renewed instructions by locking and alternately reading slave memories 失效
标题翻译：多处理器存储器管理系统和方法，用于通过锁定和交替地读取从属存储器来执行顺序更新的指令
公开(公告)号：US5522060A
公开(公告)日：1996-05-28
申请号：US331291
申请日：1994-10-28
申请人： Kei Kawase , Takashi Matsumoto , Takao Moriyama
发明人： Kei Kawase , Takashi Matsumoto , Takao Moriyama
IPC分类号： G06F13/18 , G06F15/16 , G06F15/177 , G06T1/20 , G06F13/00 , G06F13/14
CPC分类号： G06T1/20
摘要： A multiprocessor memory managing system and method make it possible for a series of instructions corresponding to a data set, which is sequentially renewed by a series of data, to be sequentially executed by a multiprocessor with small overhead. More specifically, the system and method provide a procedure dealing with a data set which is sequentially renewed by a series of data having a sequence, in which snap shots of the data set at arbitrary points of time are assigned to element processors of a multiprocessor at a high speed to execute instructions corresponding to the snap shots in an efficient and parallel fashion. The apparatus includes a master memory and first and second slave memories for storing renewable data. The first and second slave memories are alternately locked and read for snapshots of the renewable data.
摘要翻译：多处理器存储器管理系统和方法使得可以通过一系列数据顺序地更新的一系列与多个处理器以较小开销执行的指令相对应的指令成为可能。更具体地说，系统和方法提供了一种处理数据集的过程，该数据集由具有序列的一系列数据顺序地更新，其中在任意时间点的数据集的快照被分配给多处理器的元素处理器以高效率并行方式执行与快照相对应的指令的高速度。该装置包括主存储器和用于存储可再生数据的第一和第二从属存储器。第一和第二从属存储器交替地锁定并读取可再生数据的快照。

2. 发明授权

US5802570A Multiprocessor system with parallel execution of data 失效
公开(公告)号：US5802570A
公开(公告)日：1998-09-01
申请号：US702424
申请日：1996-08-14
申请人： Kei Kawase , Takao Moriyama
发明人： Kei Kawase , Takao Moriyama
IPC分类号： G06F15/16 , G06F12/08 , G06F12/00 , G06F13/00
CPC分类号： G06F12/0831
摘要： Data sets of sequential data strings at a particular point in time are assigned to processing elements of a multiprocessor system at high speed and processing is executed efficiently in parallel. A mechanism for preventing allocation due to all-read to a cache block which has not yet been referred from another cache is added by providing a reference bit with respect to cache blocks. The reference bit becomes 0 when new data is read to the cache block and becomes 1 when the cache block is referenced by a CPU. In the case of reading data from another cache, if a block corresponding thereto can be replaced without the need to be written back to the other cache and the reference bit is 1, data is fetched to the shared cache memory.

3. 发明授权

US06651082B1 Method for dynamically changing load balance and computer 失效
标题翻译：动态改变负载平衡和计算机的方法
公开(公告)号：US06651082B1
公开(公告)日：2003-11-18
申请号：US09345371
申请日：1999-07-01
申请人： Kei Kawase , Takao Moriyama , Fusashi Nakamura
发明人： Kei Kawase , Takao Moriyama , Fusashi Nakamura
IPC分类号： G06F1516
CPC分类号： G06F9/5083
摘要： A system and method which dynamically changes the load balance of assigned loads for each group in a sequence of processes from a first stage to an n-th stage in a computer having a plurality of processors, wherein the plurality of processors are grouped into at least two groups, comprises the steps of: detecting a change in a characteristic value in a queue for transferring a processing result between the groups; and changing the assignment of assigned processes for each group based on the change in the characteristic value. A characteristic value stored in a queue represents a value related to work load, and a queue seldom becomes full or empty if the load balance is changed referring to this characteristic value.
摘要翻译：一种系统和方法，其在具有多个处理器的计算机中动态地改变从第一阶段到第n阶段的处理序列中的每个组的分配负载的负载平衡，其中所述多个处理器至少分组两组包括以下步骤：检测用于传送组之间的处理结果的队列中的特征值的变化; 并且基于特征值的变化来改变每个组的分配的进程的分配。存储在队列中的特征值表示与工作负载相关的值，如果根据该特征值更改负载平衡，则队列很少变为满或空。

4. 发明授权

US06559855B1 Method for transferring image information, method for updating image information, transferring apparatus and updating apparatus 有权
标题翻译：传送图像信息的方法，更新图像信息的方法，传送装置和更新装置
公开(公告)号：US06559855B1
公开(公告)日：2003-05-06
申请号：US09300956
申请日：1999-04-28
申请人： Kei Kawase , Takao Moriyama , Fusashi Nakamura
发明人： Kei Kawase , Takao Moriyama , Fusashi Nakamura
IPC分类号： G09G502
CPC分类号： G09G5/006 , G09G3/3629 , G09G2310/04
摘要： The present invention enables image information of high resolution to be transferred via a transmission line with limited band width using a simple configuration. In transferring image information between a main body of a computer and a display, a dither matrix is used to update images stored in the display. That is, a plurality of blocks whose size is of a predetermined dither matrix are defined in an image, and information of each pixel in each block is transferred to the display in order of a value of a corresponding element in the dither matrix. Transfer of unchanged pixel data can be omitted. In addition, in transferring image information between the main body of the computer and the display, image information stored in the computer is divided into a plurality of blocks, for each of which the number of changed pixels or the number of writings to pixels in the block is calculated so that image information in blocks which exceed a predetermined number is transferred to the display block by block.
摘要翻译：本发明使得能够通过简单的配置通过具有有限带宽的传输线传送高分辨率的图像信息。在计算机主体和显示器之间传送图像信息时，使用抖动矩阵来更新存储在显示器中的图像。也就是说，在图像中定义尺寸为预定的抖动矩阵的多个块，并且按照抖动矩阵中的相应元素的值，按顺序将每个块中的每个像素的信息传送到显示。可以省略未改变的像素数据的传送。此外，在计算机主体和显示器之间传送图像信息时，存储在计算机中的图像信息被划分为多个块，对于每个块，改变的像素的数量或写入的像素的数量计算块，使得超过预定数量的块中的图像信息被块传送到显示块。

5. 发明授权

US5584011A Multiprocessor system with parallel execution of data 失效
标题翻译：具有并行执行数据的多处理器系统
公开(公告)号：US5584011A
公开(公告)日：1996-12-10
申请号：US372614
申请日：1995-01-13
申请人： Kei Kawase , Takao Moriyama
发明人： Kei Kawase , Takao Moriyama
IPC分类号： G06F15/16 , G06F12/08 , G06F12/02 , G06F13/00
CPC分类号： G06F12/0831
摘要： Data sets of sequential data strings at a particular point in time are assigned to processing elements of a multiprocessor system at high speed and processing is executed efficiently in parallel. A mechanism for preventing allocation due to all-read to a cache block which has not yet been referred from another cache is added by providing a reference bit with respect to cache blocks. The reference bit becomes 0 when new data is read to the cache block and becomes 1 when the cache block is referenced by a CPU. In the case of reading data from another cache, if a block corresponding thereto can be replaced without the need to be written back to the other cache and the reference bit is 1, data is fetched to the shared cache memory.
摘要翻译：在特定时间点的顺序数据串的数据集以高速被分配给多处理器系统的处理元件，并行地执行有效的处理。通过提供关于高速缓存块的参考比特来添加用于防止由于全部读取到尚未被从另一个高速缓存引用的高速缓存块的分配的机制。当新数据被读取到高速缓存块时，参考位变为0，当CPU引用高速缓存块时，参考位变为1。在从另一个高速缓存读取数据的情况下，如果与其相对应的块可以被替换而不需要被写回到另一个高速缓存并且参考位为1，则将数据提取到共享高速缓冲存储器。

6. 发明授权

US07386324B2 System and method for dual path terminal connection 有权
标题翻译：双路终端连接的系统和方法
公开(公告)号：US07386324B2
公开(公告)日：2008-06-10
申请号：US10247950
申请日：2002-09-20
申请人： Takao Moriyama , Kei Kawase
发明人： Takao Moriyama , Kei Kawase
IPC分类号： H04M1/00
CPC分类号： G06F3/14 , G06F3/1415 , G06F3/1454 , G09G2310/04 , G09G2370/04 , G09G2370/045
摘要： For communication between a display device and a processing apparatus (host), two connection modes are prepared, a wired connection mode, for communication along a wired connection path, and a wireless connection mode, for communication along a wireless connection path. Before entering the wireless connection mode, the processing apparatus (host) transmits, along the wired connection path to the display device, data required for the wireless connection of the display device 50 along the wireless connection path, and data required for authentication to permit information to be accessed using the wireless connection path.
摘要翻译：对于显示设备和处理设备（主机）之间的通信，准备两个连接模式，用于沿有线连接路径进行通信的有线连接模式和无线连接模式，用于沿无线连接路径进行通信。在进入无线连接模式之前，处理装置（主机）沿着有线连接路径向显示装置发送显示装置50沿着无线连接路径的无线连接所需的数据，以及认证所需的数据以允许信息使用无线连接路径进行访问。

7. 发明授权

US5757374A Method and apparatus for performing texture mapping 失效
标题翻译：用于执行纹理映射的方法和装置
公开(公告)号：US5757374A
公开(公告)日：1998-05-26
申请号：US519497
申请日：1995-08-25
申请人： Fusashi Nakamura , Kei Kawase , Takao Moriyama
发明人： Fusashi Nakamura , Kei Kawase , Takao Moriyama
IPC分类号： G06T9/00 , G06T11/20 , G06T15/00 , G06T17/10 , G06T11/00
CPC分类号： G06T17/10
摘要： A computer graphics apparatus connects a texture coordinate generator with fragment generators via a command bus. The generator is connected to a texture data bus through a texture memory cluster which comprises an address generator connected to a texture coordinate bus, a filter, and eight memories. In addition, the generator is connected to the texture data bus through a plurality of texture memory clusters. The texture data bus is connected to a plurality of drawing processors to which a plurality of frame memories are connected in correspondence. This configuration performs texture mapping through effective utilization of the texture memory clusters.
摘要翻译：计算机图形装置通过命令总线连接纹理坐标发生器和碎片生成器。发生器通过纹理存储器簇连接到纹理数据总线，纹理存储器簇包括连接到纹理坐标总线，滤波器和八个存储器的地址发生器。此外，发生器通过多个纹理存储器簇连接到纹理数据总线。纹理数据总线连接到多个绘图处理器，多个帧存储器相应地连接到该绘图处理器。该配置通过有效利用纹理存储器集群来执行纹理映射。

8. 发明授权

US08651036B2 Sewing machine operating device and sewing machine provided therewith 有权
标题翻译：缝纫机操作装置和提供的缝纫机
公开(公告)号：US08651036B2
公开(公告)日：2014-02-18
申请号：US13217969
申请日：2011-08-25
申请人： Yoko Yamanashi , Hiroyuki Suzuki , Kazuki Kojima , Kei Kawase
发明人： Yoko Yamanashi , Hiroyuki Suzuki , Kazuki Kojima , Kei Kawase
IPC分类号： D05B69/18
CPC分类号： D05B69/18 , D05D2205/04
摘要： A sewing machine operating device includes a base, a connection unit which is connectable to a sewing machine body, an output unit which is configured to generate and deliver an operation signal according to an action of a user's foot, a placement pedestal that is configured to receive the user's foot, a support unit which supports the placement pedestal so that the placement pedestal is movable in any direction on a plane that includes an upper surface of the base, and a detection unit which is configured to detect whether the placement pedestal or user's foot is located at any one of different predetermined positions when the placement pedestal is moved with the user's foot being placed on the placement pedestal.
摘要翻译：一种缝纫机操作装置，包括基座，可连接到缝纫机主体的连接单元，被配置为根据用户的脚的动作产生和传送操作信号的输出单元，配置为接收使用者的脚，支撑单元，其支撑放置基座，使得放置台座可在包括基座的上表面的平面上的任何方向上移动;以及检测单元，其被配置为检测放置台座或用户的脚当使用者的脚放置在放置基座上时，当放置台座移动时，脚位于不同的预定位置中的任何一个处。

9. 发明授权

US08199136B2 Image data transmission apparatus and method for image display system 有权
标题翻译：用于图像显示系统的图像数据传输装置和方法
公开(公告)号：US08199136B2
公开(公告)日：2012-06-12
申请号：US11635394
申请日：2006-12-06
申请人： Takenori Kohda , Sanehiro Furuichi , Moriyoshi Ohara , Kei Kawase
发明人： Takenori Kohda , Sanehiro Furuichi , Moriyoshi Ohara , Kei Kawase
IPC分类号： G06F3/038 , G09G5/00
CPC分类号： G09G5/005 , G06F3/1462 , G09G5/006 , G09G2310/04 , G09G2340/02
摘要： An image display system comprises: a transmission device (PC) 10, for transmitting image data upon receiving a drawing command from an OS or an application; and a receiving monitor 40, for displaying, on a high-resolution panel 41, image data received via a monitor cable 39, wherein the transmission device 10 includes a drawing command analysis device 20, for detecting an area on a screen wherein the content is changed by the drawing command, and for employing the detected area to calculate an area to be transmitted, and a graphics card 12, for transmitting a packet that includes the calculated area to be transmitted, and control data provided as header data for the area to be transmitted, and wherein the receiving monitor 40 includes a packet reception device 50, for analyzing the header data in the received packet and for, based on the header data, rendering image data in an internally provided frame memory.
摘要翻译：图像显示系统包括：发送装置（PC）10，用于在从OS或应用程序接收到绘图命令时发送图像数据; 以及接收监视器40，用于在高分辨率面板41上显示经由监视器电缆39接收到的图像数据，其中传输设备10包括绘图命令分析设备20，用于检测屏幕上的内容是通过绘制命令改变，并且使用检测区域来计算要发送的区域;以及图形卡12，用于发送包括计算出的要发送的区域的分组，以及作为该区域的标题数据提供的控制数据，并且其中接收监视器40包括分组接收装置50，用于分析接收到的分组中的标题数据，并且基于标题数据，在内部提供的帧存储器中渲染图像数据。

10. 发明授权

US5023533A Method and system for compliance control 失效
标题翻译：合规控制的方法和系统
公开(公告)号：US5023533A
公开(公告)日：1991-06-11
申请号：US477774
申请日：1990-02-09
申请人： Hiroshi Ishikawa , Kei Kawase
发明人： Hiroshi Ishikawa , Kei Kawase
IPC分类号： B25J9/16 , B25J9/18 , B25J13/00 , B25J13/08 , B25J17/02 , B25J19/00 , G05D3/12
CPC分类号： B25J9/1612 , B25J17/0283 , B25J19/0091
摘要： Stable compliance control at a high speed is achieved by cooperation between a manipulator and a wrist body which is located at the end of the manipulator arm.

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