专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20060246640A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20060246640A1
公开(公告)日：2006-11-02
申请号：US11410082
申请日：2006-04-25
申请人： Kazutaka Kuwashima , Tamae Takano , Shunpei Yamazaki
发明人： Kazutaka Kuwashima , Tamae Takano , Shunpei Yamazaki
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/1266 , H01L21/67207 , H01L27/1214
摘要： The present invention provides a manufacturing method of a semiconductor device at low cost and with high reliability. According to one feature of a method for manufacturing a semiconductor device includes the steps of forming a metal film over a substrate; forming a metal oxide film over the surface of the metal film by performing plasma treatment to the metal film in an atmosphere containing oxygen; forming a base film over the metal oxide film; forming an element layer having a thin film transistor over the base film; forming a protective layer over the element layer; forming an opening after selectively removing the metal film, the metal oxide film, the base film, the element layer, and the protective layer; separating the base film, the element layer, and the protective layer from the substrate; and sealing the base film, the element layer, and the protective layer by using flexible first and second films, in which an electron density of plasma around the substrate is 1×1011 cm−3 or more and 1×1013 cm−3 or less and an electron temperature of the plasma treatment is 0.5 eV or more and 1.5 eV or less.
摘要翻译：本发明以低成本，高可靠性提供半导体器件的制造方法。根据半导体器件的制造方法的一个特征，包括以下步骤：在衬底上形成金属膜; 通过在含氧的气氛中对金属膜进行等离子体处理，在金属膜的表面上形成金属氧化物膜; 在所述金属氧化物膜上形成基膜; 在所述基膜上形成具有薄膜晶体管的元件层; 在元件层上形成保护层; 在选择性地除去金属膜，金属氧化物膜，基膜，元件层和保护层之后形成开口; 从基板分离基膜，元件层和保护层; 并且通过使用柔性的第一和第二膜密封基膜，元件层和保护层，其中基板周围的等离子体的电子密度为1×10 11 cm -3， SUP以上且1×10 3 -3 -3以下，等离子体处理的电子温度为0.5eV以上至1.5eV以下。

2. 发明授权

US07364954B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07364954B2
公开(公告)日：2008-04-29
申请号：US11410082
申请日：2006-04-25
申请人： Kazutaka Kuwashima , Tamae Takano , Shunpei Yamazaki
发明人： Kazutaka Kuwashima , Tamae Takano , Shunpei Yamazaki
IPC分类号： H01L21/84
CPC分类号： H01L27/1266 , H01L21/67207 , H01L27/1214
摘要： The present invention provides a manufacturing method of a semiconductor device at low cost and with high reliability. According to one feature of a method for manufacturing a semiconductor device includes the steps of forming a metal film over a substrate; forming a metal oxide film over the surface of the metal film by performing plasma treatment to the metal film in an atmosphere containing oxygen; forming a base film over the metal oxide film; forming an element layer having a thin film transistor over the base film; forming a protective layer over the element layer; forming an opening after selectively removing the metal film, the metal oxide film, the base film, the element layer, and the protective layer; separating the base film, the element layer, and the protective layer from the substrate; and sealing the base film, the element layer, and the protective layer by using flexible first and second films, in which an electron density of plasma around the substrate is 1×1011 cm−3 or more and 1×1013 cm−3 or less and an electron temperature of the plasma treatment is 0.5 eV or more and 1.5 eV or less.
摘要翻译：本发明以低成本，高可靠性提供半导体器件的制造方法。根据半导体器件的制造方法的一个特征，包括以下步骤：在衬底上形成金属膜; 通过在含氧的气氛中对金属膜进行等离子体处理，在金属膜的表面上形成金属氧化物膜; 在所述金属氧化物膜上形成基膜; 在所述基膜上形成具有薄膜晶体管的元件层; 在元件层上形成保护层; 在选择性地除去金属膜，金属氧化物膜，基膜，元件层和保护层之后形成开口; 从基板分离基膜，元件层和保护层; 并且通过使用柔性的第一和第二膜密封基膜，元件层和保护层，其中基板周围的等离子体的电子密度为1×10 11 cm -3， SUP以上且1×10 3 -3 -3以下，等离子体处理的电子温度为0.5eV以上至1.5eV以下。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式