专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080314625A1 Printed Circuit Board and Method of Manufacturing the Same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20080314625A1
公开(公告)日：2008-12-25
申请号：US12143214
申请日：2008-06-20
申请人： Kazunori HAMADA , Hiroshi Kawasaki , Tomoaki Ozaki
发明人： Kazunori HAMADA , Hiroshi Kawasaki , Tomoaki Ozaki
IPC分类号： H05K3/46 , H05K1/02
CPC分类号： H05K3/0047 , H05K1/0237 , H05K1/0268 , H05K3/429 , H05K2203/0207 , H05K2203/0242 , Y10T29/49124 , Y10T29/49156 , Y10T29/49167
摘要： The present invention relates to a method of manufacturing a printed circuit board and to a printed circuit board, the method comprising the steps of: preliminarily forming a plurality of test pattern layers 3 and 4 for detecting the depth of an inner layer in a multilayer printed circuit board such that at least a part of a lower test pattern layer is not overlaid with any upper test pattern layer when viewed from a drill entrance side, and preliminarily forming a surface conductor layer 2; applying a voltage between the surface conductor layer 2 and the test pattern layers 3 and 4; performing drilling toward one selected test pattern layer 3 by use of a drill 7 for drilling, and detecting a current produced when the drill comes into contact with the test pattern 3 to measure the depth of the layer (D1); performing drilling toward the other test pattern layer 4 by use of the drill 7, and measuring the depth of the layer (D2); and performing drilling by use of the drill 7 up to just before the conductor-wiring layer 10a with reference to a depth calculated from D1 and D2.
摘要翻译：本发明涉及一种制造印刷电路板和印刷电路板的方法，所述方法包括以下步骤：预先形成用于检测多层印刷中的内层的深度的多个测试图案层3和4 电路板，使得当从钻入口侧观察时，下测试图案层的至少一部分不与任何上测试图案层重叠，并且预先形成表面导体层2; 在表面导体层2和测试图案层3和4之间施加电压; 通过使用用于钻孔的钻头7对一个所选择的测试图案层3进行钻孔，并且检测当钻头与测试图案3接触以测量层（D1）的深度时产生的电流; 通过使用钻头7对另一测试图案层4进行钻孔，并测量层（D2）的深度; 并且参照从D1和D2计算的深度，使用钻头7直到刚好在导体布线层10a之前进行钻孔。

IPRDB

热门服务

关于我们

友情链接

联系方式