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    • 9. 发明申请
    • Clock multiplying circuit, solid-state imaging device, and phase-shift circuit
    • 时钟倍增电路,固态成像装置和相移电路
    • US20110298955A1
    • 2011-12-08
    • US13064912
    • 2011-04-26
    • Satsuki HorimotoShunji KawaguchiShizunori Matsumoto
    • Satsuki HorimotoShunji KawaguchiShizunori Matsumoto
    • H04N5/335H03H11/22
    • H04N5/3765G06F7/68H03K5/00006H03K5/1565H03M9/00
    • A clock multiplying circuit includes: first and second inverters being ON/OFF-controlled by a positive- or negative-phase signal, respectively, of a first clock signal and including current source and current sync terminals; a capacitive element provided between output ends of the inverters; a current supplying unit increasing, if a frequency of the first clock signal increases, the control current and supplying the control current to the current source terminals of the inverters and outputting, from the current sync terminals of the inverters, a control current the same current amount as that of a control current to the current source terminal; a differential detecting unit receiving input of a potential difference signal between both electrodes of the capacitive element and generating a second clock signal having a phase difference of 90 degrees; and a multiplied-signal generating unit generating a double signal of the first clock signal on the basis of the clock signals.
    • 时钟倍增电路包括:第一和第二反相器分别由第一时钟信号的正或负相位信号进行ON / OFF控制,并包括电流源和当前同步端; 设置在逆变器的输出端之间的电容元件; 如果第一时钟信号的频率增加,则电流供给单元增加控制电流,并且向逆变器的电流源极提供控制电流,并且从逆变器的当前同步端子输出控制电流相同的电流 与当前源终端的控制电流量相当; 差分检测单元,接收所述电容元件的两个电极之间的电位差信号的输入,并产生具有90度的相位差的第二时钟信号; 以及乘法信号生成单元,其基于时钟信号生成第一时钟信号的双倍信号。
    • 10. 发明申请
    • SOLID-STATE IMAGE PICKUP DEVICE AND CAMERA SYSTEM
    • 固态图像拾取器件和摄像机系统
    • US20090046190A1
    • 2009-02-19
    • US12190170
    • 2008-08-12
    • Shizunori Matsumoto
    • Shizunori Matsumoto
    • H04N5/335H04N5/225
    • H04N5/378H04N5/335H04N5/37455
    • A solid-state image pickup device includes a pixel array including a plurality of pixels arranged in a matrix, and a pixel signal read-out circuit for reading out a pixel signal from the pixel array in units of a plurality of pixels. The pixel signal read-out circuit includes a plurality of comparators and a plurality of counters. The comparators are disposed to correspond to a column of the pixels, and compare a read-out signal potential and a reference voltage to generate a determination signal and output the determination signal. The counters are controlled by outputs of the comparators. Each of the counters is configured to count a comparison time of a corresponding comparator of the comparators. The counters have a different operation period for each one or a plurality of columns.
    • 固态图像拾取装置包括:包括以矩阵排列的多个像素的像素阵列;以及像素信号读出电路,用于以多个像素为单位读出来自像素阵列的像素信号。 像素信号读出电路包括多个比较器和多个计数器。 比较器被设置为对应于像素的列,并且比较读出的信号电位和参考电压以产生确定信号并输出​​确定信号。 计数器由比较器的输出控制。 每个计数器被配置为对比较器的相应比较器的比较时间进行计数。 计数器对于每个列或多个列具有不同的操作周期。