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1. 发明授权

US4488296A Time division multiple access system for transmitting an analog signal by the use of bursts without substantial interruption 失效
标题翻译：时分多址系统，用于通过使用突发而无需实质中断来发送模拟信号
公开(公告)号：US4488296A
公开(公告)日：1984-12-11
申请号：US395113
申请日：1982-07-06
申请人： Kazuhiro Yamamoto , Masaaki Atobe
发明人： Kazuhiro Yamamoto , Masaaki Atobe
IPC分类号： H04B7/212 , H04J3/00 , H04J3/12
CPC分类号： H04B7/212 , H04J3/12
摘要： In a time division multiple access system comprising a central station and a plurality of substations, a subsidiary analog signal is sampled at a sampling circuit of each substation M times during each frame period to produce a succession of sampled pulses. A group of M sampled pulses is located by a substation delay circuit in each up-link burst assigned to each substation. Responsive to an up-link succession including each up-link burst, the central station reproduces the sampled pulse group from each up-link burst into a reproduced group of M reproduced pulses by central station sampling pulses synchronized with the M sampled pulses. The M reproduced pulses are rearranged by a central station delay circuit into sampled pulse reproductions appearing M times in each frame period. The sampled pulse reproductions are desampled into the subsidiary signal. The number of M may be equal to or greater than one.
摘要翻译：在包括中心站和多个变电站的时分多址系统中，在每个帧周期期间在每个子站M的采样电路采样辅助模拟信号，以产生一系列采样脉冲。一组M个采样脉冲由分配给每个变电站的每个上行链路脉冲中的分站延迟电路定位。响应于包括每个上行链路脉冲串的上行链路继承，中心站通过与M个采样脉冲同步的中心站采样脉冲将每个上行链路脉冲串中的采样脉冲组再现成M个再现脉冲的再现组。 M个再现脉冲由中心站延迟电路重新排列成在每个帧周期中出现M次的采样脉冲复制。采样的脉冲复制品被取样到辅助信号中。 M的数量可以等于或大于1。

2. 发明授权

US3967220A Variable delay equalizer 失效
标题翻译：可变延迟均衡器
公开(公告)号：US3967220A
公开(公告)日：1976-06-29
申请号：US600682
申请日：1975-07-31
申请人： Yoshimi Tagashira , Masaaki Atobe , Kazuhiro Yamamoto
发明人： Yoshimi Tagashira , Masaaki Atobe , Kazuhiro Yamamoto
IPC分类号： H03H7/01 , H01P9/00 , H04B3/14 , H03H7/14 , H01P1/20
CPC分类号： H04B3/148 , H01P9/003
摘要： A variable delay equalizer comprises two directional couplers, each having a pair of input terminals and a pair of output terminals. A pair of variable phase shifters are inserted respectively between the output terminals of the first coupler and the input terminals of the second coupler. A third variable phase shifter is connected between the second output terminal of the second coupler and the second input terminal of the first coupler. This equalizer makes it possible to shift the peak delay frequency as well as to change the value of the peak delay itself.
摘要翻译：可变延迟均衡器包括两个定向耦合器，每个具有一对输入端子和一对输出端子。一对可变移相器分别插入在第一耦合器的输出端和第二耦合器的输入端之间。第三可变移相器连接在第二耦合器的第二输出端和第一耦合器的第二输入端之间。该均衡器使得可以移位峰值延迟频率以及改变峰值延迟本身的值。

3. 发明授权

US4483000A Circuit for eliminating spurious components resulting from burst control in a TDMA system 失效
标题翻译：用于消除由TDMA系统中的脉冲串控制引起的杂散分量的电路
公开(公告)号：US4483000A
公开(公告)日：1984-11-13
申请号：US338598
申请日：1982-01-11
申请人： Kazuhiro Yamamoto , Masaaki Atobe
发明人： Kazuhiro Yamamoto , Masaaki Atobe
IPC分类号： H04B7/212 , H04J3/10 , H04J3/16
CPC分类号： H04B7/212 , H04J3/10
摘要： In an electronic circuit comprising a modulator (35) and used in each substation of a TDMA system and responsive to a baseband data signal sequence for producing a burst in accordance with a first burst control pulse, spurious components resulting in the burst from the first burst control pulse are eliminated either by allowing the data sequence to pass through a low-pass filter (36) after switching (45) the sequence by the first burst control pulse or by filtering the first burst control pulse by a low-pass filter before switching a local oscillation signal by the first control pulse. An additional switching circuit may switch either a modulated signal supplied from the modulator or the local oscillation signal in response to a second burst control pulse that disappears after extinction of the first burst control pulse. Alternatively, a modifying circuit reverses polarities of a preceding and a following data signals immediately preceding and following the sequence, relative to a leading and a trailing end data signals of the sequence.
摘要翻译：在包括调制器（35）并且在TDMA系统的每个子站中使用并响应于基带数据信号序列以用于根据第一突发控制脉冲产生脉冲串的电子电路中，产生从第一突发通过允许数据序列在切换（45）序列第一突发控制脉冲之后通过低通滤波器（36）或者在切换之前通过低通滤波器对第一突发控制脉冲进行滤波来消除控制脉冲通过第一控制脉冲的本地振荡信号。响应于在第一突发控制脉冲消失之后消失的第二脉冲串控制脉冲，另外的切换电路可以切换从调制器提供的调制信号或本地振荡信号。或者，修改电路相对于序列的前端数据信号和后端数据信号反转在序列之前和之后的先前和后续数据信号的极性。

4. 发明授权

US4570127A Automatic gain control circuit for burst signal communication system 失效
标题翻译：用于脉冲信号通信系统的自动增益控制电路
公开(公告)号：US4570127A
公开(公告)日：1986-02-11
申请号：US569257
申请日：1984-01-09
申请人： Yoshio Tanimoto , Masaaki Atobe
发明人： Yoshio Tanimoto , Masaaki Atobe
IPC分类号： H04B3/06 , H03G3/20 , H04B7/212 , H04J3/00
CPC分类号： H03G3/3078 , H03G3/3036 , H03G3/3073 , H04B7/212
摘要： An AGC circuit for amplifying burst signals has output power which does not vary, regardless of variations in the burst time. This automatic gain control (AGC) circuit has an amplifier for receiving a burst signal input and providing an amplified burst output. The level of amplification is controlled in response to a control signal applied to the amplifier. A negative feedback circuit includes an envelope detector for receiving the burst output and a circuit for providing a comparison signal in response to a comparison between the voltage leads of the detected envelope signal and a reference voltage. The comparison signal is converted into a binary signal which is counted down to provide the amplifier control signal.
摘要翻译：用于放大突发信号的AGC电路具有不变化的输出功率，而与突发时间的变化无关。该自动增益控制（AGC）电路具有用于接收脉冲串信号输入并提供放大的突发输出的放大器。响应于施加到放大器的控制信号来控制放大电平。负反馈电路包括用于接收突发输出的包络检测器和用于响应于检测到的包络信号的电压引线与参考电压之间的比较而提供比较信号的电路。比较信号被转换成二进制信号，其被递减计数以提供放大器控制信号。

5. 发明授权

US4591797A PSK demodulator having an AFC circuit 失效
标题翻译：具有AFC电路的PSK解调器
公开(公告)号：US4591797A
公开(公告)日：1986-05-27
申请号：US714377
申请日：1985-03-21
申请人： Yoshio Tanimoto , Masaaki Atobe
发明人： Yoshio Tanimoto , Masaaki Atobe
IPC分类号： H03D3/18 , H04L27/227 , H03D3/02 , H04L27/22
CPC分类号： H04L27/2276
摘要： A PSK demodulator is disclosed. The demodulator includes a voltage controlled oscillator response to a control circuit in a frequency converter for converting an input PSK signal as a function of the output of the voltage controlled oscillator. A carrier recovery circuit recovers a carrier wave from the output of the frequency converter means and applies the recovered output to a band-pass filter. A phase detector detects the output of the frequency converter as a function of the output of the band-pass filter and provides a demodulated signal and function thereof. A phase comparator is provided for detecting the phase difference between the input and output signals of the band-pass filter and a low-pass filter responsive to the output of the phase comparator provides the control signal.
摘要翻译：公开了一种PSK解调器。解调器包括对频率转换器中的控制电路的压控振荡器响应，用于根据压控振荡器的输出转换输入PSK信号。载波恢复电路从变频器装置的输出恢复载波，并将恢复的输出施加到带通滤波器。相位检测器根据带通滤波器的输出检测变频器的输出，并提供解调信号及其功能。提供了相位比较器，用于检测带通滤波器的输入和输出信号之间的相位差，并且响应于相位比较器的输出的低通滤波器提供控制信号。

6. 发明授权

US4607377A Transversal type equalizer apparatus 失效
标题翻译：横向式均衡器
公开(公告)号：US4607377A
公开(公告)日：1986-08-19
申请号：US603818
申请日：1984-04-25
申请人： Masaaki Atobe , Susumu Otani
发明人： Masaaki Atobe , Susumu Otani
IPC分类号： H04L25/03 , H04B3/04
CPC分类号： H04L25/03133
摘要： Optimum tap coefficients corresponding to equalization characteristics are stored in a memory circuit and when an equalization characteristics is designated, an optimum tap coefficient is read out of the memory circuit and a transversal type equalizer is controlled by the read-out optimum tap coefficient. According to a modified embodiment, where a tap coefficient for a combined characteristic based on a combination of a plurality of transmission characteristics is necessary, a convolution operation of the tap coefficients for respective transmission characteristics is effected to determine a new tap coefficient which is used to set taps of the transversal type equalizer.
摘要翻译：对应于均衡特性的最佳抽头系数存储在存储器电路中，并且当指定均衡特性时，从存储器电路中读出最佳抽头系数，并且通过读出的最佳抽头系数来控制横向型均衡器。根据修改的实施例，其中需要基于多个传输特性的组合的组合特征的抽头系数，对各个传输特性进行抽头系数的卷积运算，以确定用于设置横向型均衡器的抽头。

7. 发明授权

US4525676A PSK Demodulation system having carrier frequency variation compensation 失效
标题翻译： PSK解调系统具有载波频率变化补偿
公开(公告)号：US4525676A
公开(公告)日：1985-06-25
申请号：US351258
申请日：1982-02-22
申请人： Masaaki Atobe , Yoshimi Tagashira
发明人： Masaaki Atobe , Yoshimi Tagashira
IPC分类号： H04L27/227 , H03D3/02
CPC分类号： H04L27/2277
摘要： A system for demodulation of phase shift keying signals with a bandpass filter tracked to input carrier frequency variation. This system provides means for detecting phase variations in the regenerated carrier wave from the demodulated signal, and means for controlling the phase of the regenerated carrier wave to compensate for the demodulation error owing to input carrier frequency variation.
摘要翻译：用带通滤波器解调相移键控信号的系统，用于输入载波频率变化。该系统提供用于检测来自解调信号的再生载波中的相位变化的装置，以及用于控制再生载波的相位以补偿由于输入载波频率变化引起的解调误差的装置。

8. 发明授权

US4479099A Multiple phase modulator for N sets of digital data 失效
标题翻译：用于N组数字数据的多相调制器
公开(公告)号：US4479099A
公开(公告)日：1984-10-23
申请号：US374656
申请日：1982-05-04
申请人： Masaaki Atobe
发明人： Masaaki Atobe
IPC分类号： H03K7/06 , H04L27/20
CPC分类号： H03K7/06 , H04L27/20
摘要： A 2.sup.N -phase phase modulator is formed from a plurality of series-connected 2-phase phase modulators. Each of the 2-phase phase modulators includes an Exclusive OR gate receiving at one input terminal one of a plurality of digital data sets. The first phase modulator receives a carrier signal at its other input terminal, and all subsequent phase modulators receive an output from a previous phase modulator through a 1/2 frequency divider.
摘要翻译： 2N相位调制器由多个串联连接的2相相位调制器形成。两相相位调制器中的每一个包括在一个输入端接收多个数字数据集中的一个的异或门。第一相位调制器在其另一输入端接收载波信号，所有后续的相位调制器通过1/2分频器接收来自前一相位调制器的输出。

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