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1. 发明授权

US07786036B2 Dielectric porcelain composition, and method for manufacturing capacitor using the same 有权
标题翻译：介电瓷组合物及其制造方法
公开(公告)号：US07786036B2
公开(公告)日：2010-08-31
申请号：US11795128
申请日：2006-03-24
申请人： Kazuhiro Komatsu , Kazuki Hirata , Atsuo Nagai , Tadashi Onomi , Kenji Oka
发明人： Kazuhiro Komatsu , Kazuki Hirata , Atsuo Nagai , Tadashi Onomi , Kenji Oka
IPC分类号： C04B35/468
CPC分类号： C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3239 , C04B2235/3263 , C04B2235/3418 , C04B2235/5409 , C04B2235/5445 , C04B2235/658 , C04B2235/6582 , C04B2235/6588 , C04B2235/663 , C04B2235/79 , C04B2235/96 , H01B3/12 , H01G4/1227 , H01G4/30
摘要： A dielectric ceramic composition containing at least 0.15 to 2.5 mol of a Mg compound in terms of MgO, 0 to 1.6 mol of a Ba compound in terms of BaCO3, 0.1 to 3.0 mol of a Ln (Ln includes two or three kinds of elements selected from Er, Dy, and Ho with Er being essential) compound in terms of Ln2O3, 0.01 to 0.4 mol of a Mn compound in terms of MnO4/3, 0.01 to 0.26 mol of a V compound in terms of V2O5, 0.3 to 3.5 mol of a Si compound in terms of SiO2, and 0.01 to 2.5 mol of an Al compound in terms of Al2O3 to 100 mol of barium titanate adjusted for a Ba/Ti molar ratio of 0.997 to 1.007.
摘要翻译：一种电介质陶瓷组合物，其包含至少0.15至2.5摩尔的Mg化合物，以MgO计，0至1.6摩尔Ba化合物，以BaCO 3计，0.1至3.0摩尔的Ln（Ln包括选择的两种或三种元素从Er，Dy和Ho与Er是必需的）化合物以Ln 2 O 3计，0.01〜0.4mol的Mn化合物换算成MnO 4/3，0.01〜0.26mol V化合物，V2O5为0.3〜3.5mol 的Si化合物，以SiO 2为0.01〜2.5摩尔的Al化合物，以Ba 2 Ti摩尔比为0.997〜1.007调节的Al 2 O 3〜100摩尔的钛酸钡。

2. 发明申请

US20080115876A1 Dielectric Porcelain Composition, and Method for Manufacturing Capacitor Using the Same 有权
标题翻译：介电瓷组合物及使用其制造电容器的方法
公开(公告)号：US20080115876A1
公开(公告)日：2008-05-22
申请号：US11795128
申请日：2006-03-24
申请人： Kazuhiro Komatsu , Kazuki Hirata , Atsuo Nagai , Tadashi Onomi , Kenji Oka
发明人： Kazuhiro Komatsu , Kazuki Hirata , Atsuo Nagai , Tadashi Onomi , Kenji Oka
IPC分类号： B32B38/00 , C04B35/468
CPC分类号： C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3239 , C04B2235/3263 , C04B2235/3418 , C04B2235/5409 , C04B2235/5445 , C04B2235/658 , C04B2235/6582 , C04B2235/6588 , C04B2235/663 , C04B2235/79 , C04B2235/96 , H01B3/12 , H01G4/1227 , H01G4/30
摘要： A dielectric ceramic composition containing at least 0.15 to 2.5 mol of a Mg compound in terms of MgO, 0 to 1.6 mol of a Ba compound in terms of BaCO3, 0.1 to 3.0 mol of a Ln (Ln includes two or three kinds of elements selected from Er, Dy, and Ho with Er being essential) compound in terms of Ln2O3, 0.01 to 0.4 mol of a Mn compound in terms of MnO4/3, 0.01 to 0.26 mol of a V compound in terms of V2O5, 0.3 to 3.5 mol of a Si compound in terms of SiO2, and 0.01 to 2.5 mol of an Al compound in terms of Al2O3 to 100 mol of barium titanate adjusted for a Ba/Ti molar ratio of 0.997 to 1.007.
摘要翻译：一种电介质陶瓷组合物，其包含至少0.15至2.5摩尔的Mg化合物，以MgO计，0至1.6摩尔Ba化合物以BaCO 3 3计，0.1至3.0摩尔的Ln（Ln 包括选自Er，Dy和Ho中的两种或三种元素，其中Er是必需的）化合物，根据Ln 2 O 3 3，0.01至0.4mol的Mn 化合物的MnO 3/3/3，0.01〜0.26摩尔V化合物，以V 2 O 5 N计，0.3〜3.5摩尔的Si化合物，以SiO 2 2计，0.01〜2.5摩尔Al化合物，以Al 2 O 3〜100摩尔的Ba / Ti摩尔比为0.997〜1.007的钛酸钡。

3. 发明授权

US07335328B2 Method for manufacturing multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器制造方法
公开(公告)号：US07335328B2
公开(公告)日：2008-02-26
申请号：US10502602
申请日：2003-10-24
申请人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
发明人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
IPC分类号： H01G4/00 , C04B33/32
CPC分类号： H01G4/30 , H01G4/1227
摘要： A method of manufacturing a multilayer ceramic capacitor includes the steps of: preparing a mixture of a raw material powder mainly composed of barium titanate particles; forming the mixture and a binder into a green sheet; alternately layering the green sheet and an internal electrode to obtain a laminated body; and sintering the laminated body. The step of preparing the mixture includes the steps of: introducing the raw material powder and the dispersion medium into a mixing container, and stirring them with balls serving as a mixing medium, to obtain a slurry containing a raw material powder mixture; and drying the slurry. The mixing medium has a diameter that is equal to or less than 400 times the mean particle size of the barium titanate particles of the raw material. The present invention provides a multilayer ceramic capacitor having good DC bias characteristics by suppressing the variation in crystal particles.
摘要翻译：制造多层陶瓷电容器的方法包括以下步骤：制备主要由钛酸钡颗粒组成的原料粉末的混合物; 将所述混合物和粘合剂形成生片; 交替层叠生片和内部电极以获得层压体; 并烧结层叠体。制备混合物的步骤包括以下步骤：将原料粉末和分散介质引入混合容器中，并用作为混合介质的滚珠搅拌，得到含有原料粉末混合物的浆料; 并干燥浆料。混合介质的直径等于或小于原料的钛酸钡颗粒的平均粒度的400倍。本发明通过抑制晶体颗粒的变化来提供具有良好DC偏置特性的多层陶瓷电容器。

4. 发明授权

US06947276B2 Process for producing laminated ceramic capacitor 有权
标题翻译：叠层陶瓷电容器的制造工艺
公开(公告)号：US06947276B2
公开(公告)日：2005-09-20
申请号：US10502620
申请日：2003-10-24
申请人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
发明人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
IPC分类号： C04B35/468 , H01G4/06 , H01G4/12 , H01G4/228 , H01G4/30 , H01G7/00 , H05K3/36
CPC分类号： C04B35/4682 , B32B2311/22 , C04B2235/3206 , C04B2235/3224 , C04B2235/3263 , C04B2235/3418 , C04B2235/5409 , C04B2235/5445 , C04B2235/6025 , C04B2235/6582 , C04B2235/6587 , C04B2237/346 , C04B2237/405 , H01G4/1227 , Y10T29/43 , Y10T29/435 , Y10T29/49126 , Y10T29/49128
摘要： The present invention relates to a method of manufacturing a multilayer ceramic capacitor, having the steps of: (a) alternately layering internal electrodes and ceramic green sheets containing a ceramic material having barium titanate to form a laminated body; (b) sintering the laminated body to obtain a sintered body; and (c) forming an external electrode on end faces of the sintered body to obtain a multilayer ceramic capacitor. The barium titanate has a diffraction line derived from (002) plane and a diffraction line derived from (200) plane in an X-ray diffraction chart. The ratio I(200)/Ib of peak intensity I(200) at 2θ(200) to diffraction intensity Ib at a midpoint angle between peak angle 2θ(002) of the diffraction line derived from the (002) plane and peak angle 2θ(200) of the diffraction line derived from the (200) plane is 2 to 10. The product r·Sa of mean particle size r (μm) of the barium titanate and specific surface area Sa (m2/g) is 1 to 2.
摘要翻译：本发明涉及一种制造多层陶瓷电容器的方法，具有以下步骤：（a）将包含具有钛酸钡的陶瓷材料的内部电极和陶瓷生坯交替层叠以形成层压体; （b）烧结层压体以获得烧结体; （c）在烧结体的端面上形成外部电极，得到多层陶瓷电容器。在X射线衍射图中，钛酸钡具有衍生自（002）面的衍射线和衍生自（200）面的衍射线。（2）（200）的峰强度I（200）的比值I（200）/ I B （002）面的衍射线的峰角2θ（002）与峰角2θ（200°）之间的中点角度处的衍射强度I 衍生自（200）面的衍射线的为2〜10。钛酸钡的平均粒径r（母体）与比表面积Sa（m <2） SUP> / g）为1〜2。

5. 发明申请

US20050102808A1 Process for producing laminated ceramic capacitor 有权
标题翻译：叠层陶瓷电容器的制造工艺
公开(公告)号：US20050102808A1
公开(公告)日：2005-05-19
申请号：US10502620
申请日：2003-10-24
申请人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
发明人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
IPC分类号： C04B35/468 , H01G4/06 , H01G4/12 , H01G4/228 , H01G4/30 , H01G7/00 , H05K3/36
CPC分类号： C04B35/4682 , B32B2311/22 , C04B2235/3206 , C04B2235/3224 , C04B2235/3263 , C04B2235/3418 , C04B2235/5409 , C04B2235/5445 , C04B2235/6025 , C04B2235/6582 , C04B2235/6587 , C04B2237/346 , C04B2237/405 , H01G4/1227 , Y10T29/43 , Y10T29/435 , Y10T29/49126 , Y10T29/49128
摘要： The present invention relates to a method of manufacturing a multilayer ceramic capacitor, comprising the steps of: (a) alternately layering internal electrodes and ceramic green sheets containing a ceramic material comprising barium titanate to form a laminated body; (b) sintering the laminated body to obtain a sintered body; and (c) forming an external electrode on end faces of the sintered body to obtain a multilayer ceramic capacitor. The barium titanate has a diffraction line derived from (002) plane and a diffraction line derived from (200) plane in an X-ray diffraction chart. The ratio I(200)/Ib of peak intensity I(200)at 2θ(200) to diffraction intensity Ib at a midpoint angle between peak angle 2θ(002) of the diffraction line derived from the (002) plane and peak angle 2θ(200) of the diffraction line derived from the (200) plane is 2 to 10. The product r·Sa of mean particle size r (μm) of the barium titanate and specific surface area Sa (m2/g) is 1 to 2.
摘要翻译：本发明涉及一种制造多层陶瓷电容器的方法，包括以下步骤：（a）将包含钛酸钡的陶瓷材料的内部电极和陶瓷生片交替层叠以形成层压体; （b）烧结层压体以获得烧结体; （c）在烧结体的端面上形成外部电极，得到多层陶瓷电容器。在X射线衍射图中，钛酸钡具有衍生自（002）面的衍射线和衍生自（200）面的衍射线。（2）（200）的峰强度I（200）的比值I（200）/ I B （002）面的衍射线的峰角2θ（002）与峰角2θ（200°）之间的中点角度处的衍射强度I 衍生自（200）面的衍射线的为2〜10。钛酸钡的平均粒径r（母体）与比表面积Sa（m <2） SUP> / g）为1〜2。

6. 发明申请

US20050116393A1 Method for manufacturing multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器制造方法
公开(公告)号：US20050116393A1
公开(公告)日：2005-06-02
申请号：US10502602
申请日：2003-10-24
申请人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
发明人： Kazuki Hirata , Kenji Oka , Kazuhiro Komatsu , Atsuo Nagai
IPC分类号： C04B33/32 , H01G4/12 , H01G4/30
CPC分类号： H01G4/30 , H01G4/1227
摘要： A method of manufacturing a multilayer ceramic capacitor includes the steps of: preparing a mixture of a raw material powder mainly composed of barium titanate particles; forming the mixture and a binder into a green sheet; alternately layering the green sheet and an internal electrode to obtain a laminated body; and sintering the laminated body. The step of preparing the mixture includes the steps of: introducing the raw material powder and the dispersion medium into a mixing container, and stirring them with balls serving as a mixing medium, to obtain a slurry containing a raw material powder mixture; and drying the slurry. The mixing medium has a diameter that is equal to or less than 400 times the mean particle size of the barium titanate particles of the raw material. The present invention provides a multilayer ceramic capacitor having good DC bias characteristics by suppressing the variation in crystal particles.
摘要翻译：制造多层陶瓷电容器的方法包括以下步骤：制备主要由钛酸钡颗粒组成的原料粉末的混合物; 将所述混合物和粘合剂形成生片; 交替层叠生片和内部电极以获得层压体; 并烧结层叠体。制备混合物的步骤包括以下步骤：将原料粉末和分散介质引入混合容器中，并用作为混合介质的滚珠搅拌，得到含有原料粉末混合物的浆料; 并干燥浆料。混合介质的直径等于或小于原料的钛酸钡颗粒的平均粒度的400倍。本发明通过抑制晶体颗粒的变化来提供具有良好DC偏置特性的多层陶瓷电容器。

7. 发明授权

US08949043B2 Surface inspecting apparatus and method for calibrating same 有权
标题翻译：表面检查装置及其校准方法
公开(公告)号：US08949043B2
公开(公告)日：2015-02-03
申请号：US13202734
申请日：2010-02-02
申请人： Kenji Oka , Kenji Mitomo , Kenichiro Komeda
发明人： Kenji Oka , Kenji Mitomo , Kenichiro Komeda
IPC分类号： G01N21/94 , G01N21/93 , G01N21/95
CPC分类号： G01N21/9501 , G01N21/93 , G01N2201/103
摘要： While an illumination optical system is irradiating the surface of a contaminated standard wafer with illumination light, this illumination light is scanned over the surface of the contaminated standard wafer, then detectors of a detection optical system each detect the light scattered from the surface of the contaminated standard wafer, next a predefined reference value in addition to detection results on the scattered light is used to calculate a compensation parameter “Comp” for detection sensitivity correction of photomultiplier tubes of the detectors, and the compensation parameter “Comp” is separated into a time-varying deterioration parameter “P”, an optical characteristics parameter “Opt”, and a sensor characteristics parameter “Lr”, and correspondingly managed. This makes is easy to calibrate the detection sensitivity.
摘要翻译：当照明光学系统用照明光照射污染的标准晶片的表面时，该照明光被扫描在受污染的标准晶片的表面上，然后检测光学系统的检测器每个都检测从污染的表面散射的光标准晶片，接下来的预定参考值除了散射光上的检测结果之外，用于计算检测器的光电倍增管的检测灵敏度校正的补偿参数“Comp”，并将补偿参数“Comp”分为时间 - 变化劣化参数“P”，光学特性参数“Opt”和传感器特性参数“Lr”，并相应地管理。这使得检测灵敏度变得容易。

8. 发明授权

US08831899B2 Inspecting apparatus and an inspecting method 有权
标题翻译：检查仪器和检查方法
公开(公告)号：US08831899B2
公开(公告)日：2014-09-09
申请号：US13127051
申请日：2009-10-15
申请人： Kazunori Nemoto , Akira Hamamatsu , Hideo Ota , Kenji Oka , Takahiro Jingu
发明人： Kazunori Nemoto , Akira Hamamatsu , Hideo Ota , Kenji Oka , Takahiro Jingu
IPC分类号： G01C19/00 , G01N21/00 , B82Y35/00 , G01N21/93 , G01B11/30 , G01N21/95 , G01N21/88 , H01L21/66
CPC分类号： G01B11/303 , B82Y35/00 , G01N21/93 , G01N21/9501 , G01N2021/8822 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A system and method for determining measurement results of a dark-field inspection apparatus up to a microscopic area. A dark-field inspection apparatus is calibrated using a reference wafer having microroughness of an irregular asperity pattern accurately formed on a surface, and the microroughness of the surface having an ensured microroughness degree. This microroughness is measured by using an AFM, and an expected haze value is obtained based on the measured value. Then, haze of the surface of the reference wafer is measured by the dark-field inspection apparatus to be inspected to obtain an actually-measured haze value, and a difference between the expected haze value and the actually-measured haze value is obtained. Based on this difference, a haze measurement parameter of the dark-field inspection apparatus is adjusted so that the actually-measured haze value and the expected haze value match each other.
摘要翻译：用于确定暗视场检查装置的测量结果直到微观区域的系统和方法。使用具有精确形成在表面上的不规则凹凸图案的微粗糙度的参考晶片校准暗场检查装置，并且具有确保的微粗糙度的表面的微粗糙度。通过使用AFM测量该微粗糙度，并且基于测量值获得预期雾度值。然后，通过需要检查的暗视野检查装置测量参考晶片的表面的雾度，以获得实际测得的雾度值，并获得预期雾度值和实际测得的雾度值之间的差。基于该差异，调整暗场检查装置的雾度测量参数，使得实际测量的雾度值和预期雾度值彼此匹配。

9. 发明授权

US08804108B2 Inspection method and inspection apparatus 有权
标题翻译：检验方法和检验仪器
公开(公告)号：US08804108B2
公开(公告)日：2014-08-12
申请号：US13202727
申请日：2009-12-04
申请人： Kenji Mitomo , Kenji Oka
发明人： Kenji Mitomo , Kenji Oka
IPC分类号： G01N21/00
CPC分类号： G01N21/9501 , G01N21/94 , G01N21/956 , G01N2021/4707 , G01N2021/8822
摘要： This application relates to an inspection apparatus including: a stage which holds a specimen; an illumination optical system which illuminates a surface of the specimen held on the stage, with illumination light; a dark-field optical system which detects scattered light generated by the illumination light with which the specimen is illuminated; a photoelectric converter which converts the scattered light detected by the dark-field optical system, into an electric signal; an A/D converter which converts the electric signal obtained by conversion by the photoelectric converter, into a digital signal; a judgement unit which determines the dimension of a foreign substance on the surface of the specimen on the basis of a magnitude of the scattered light from the foreign substance; and a signal processor which determines an inspection condition by use of information on the scattered light from the specimen surface.
摘要翻译：本申请涉及一种检查装置，包括：保持试样的台架; 照明光学系统，用照明光照亮保持在舞台上的标本的表面; 一个暗场光学系统，用于检测被照射的照明光产生的散射光; 将由暗视场光学系统检测出的散射光转换成电信号的光电转换器; 将通过光电转换器的转换获得的电信号转换为数字信号的A / D转换器; 判断单元，其基于来自异物的散射光的大小来确定样品表面上的异物的尺寸; 以及信号处理器，其通过使用关于来自样本表面的散射光的信息来确定检查条件。

10. 发明授权

US08552445B2 Semiconductor light emitting device and method for manufacturing the same 有权
标题翻译：半导体发光器件及其制造方法
公开(公告)号：US08552445B2
公开(公告)日：2013-10-08
申请号：US12808472
申请日：2008-12-26
申请人： Yohei Wakai , Hiroaki Matsumura , Kenji Oka
发明人： Yohei Wakai , Hiroaki Matsumura , Kenji Oka
IPC分类号： H01L33/00
CPC分类号： H01L33/005 , H01L33/007 , H01L33/0079 , H01L33/20 , H01L33/22 , H01L33/36 , H01L33/382 , H01L33/44 , H01L2933/0016 , H01L2933/0058
摘要： A semiconductor light emitting device having high reliability and excellent light distribution characteristics is provided. Specifically, a semiconductor light emitting device 1 is provided with an n-electrode 50, which is arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack 40 is mounted on a substrate 10. A plurality of convexes are arranged on a first convex region 80 and a second convex region 90 on the light extraction surface. The second convex region 90 adjoins to the interface between the n-electrode 50 and the semiconductor stack 40, between the first convex region 80 and the n-electrode 50. The base end of the first convex arranged in the first convex region 80 is positioned closer to alight emitting layer 42 than the interface between the n-electrode 50 and the semiconductor stack 40, and the base end of the second convex arranged in the second convex region 90 is positioned closer to the interface between the n-electrode 50 and the semiconductor stack 40 than the base end of the first convex.
摘要翻译：提供了具有高可靠性和优异的光分布特性的半导体发光器件。具体地，半导体发光器件1设置有n电极50，其被配置在与衬底10上安装有半导体堆叠40的表面相反侧的光提取表面上。多个凸起布置在光提取表面上的第一凸区80和第二凸区90上。第二凸区域90与第一凸区域80和n电极50之间的n电极50和半导体堆叠体40之间的界面相邻。布置在第一凸区域80中的第一凸部的基端位于比n电极50和半导体堆叠40之间的界面更靠近发光层42，并且布置在第二凸区域90中的第二凸起的基端位于更靠近n电极50和第二凸起区域90之间的界面处。半导体堆叠40比第一凸起的基端。

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