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1. 发明授权

US08869391B2 Producing method of wired circuit board 有权
标题翻译：有线电路板的生产方法
公开(公告)号：US08869391B2
公开(公告)日：2014-10-28
申请号：US13317648
申请日：2011-10-25
申请人： Katsutoshi Kamei , Yuu Sugimoto , Hitoki Kanagawa
发明人： Katsutoshi Kamei , Yuu Sugimoto , Hitoki Kanagawa
IPC分类号： H05K3/10 , H05K3/42 , G11B5/48 , H05K1/05
CPC分类号： H05K3/421 , G11B5/486 , H05K1/056 , H05K3/108 , H05K2201/09509 , H05K2203/1105 , Y10T29/49002 , Y10T29/49117 , Y10T29/49124 , Y10T29/49155
摘要： A method for producing a wired circuit board includes the steps of preparing a metal supporting layer, forming an insulating layer on the metal supporting layer so as to form an opening, forming a conductive thin film on the insulating layer and on the metal supporting layer that is exposed from the opening of the insulating layer, heating the conductive thin film, forming a conductive pattern on the conductive thin film that is formed on the insulating layer, and forming a metal connecting portion to be continuous to the conductive pattern on the conductive thin film that is formed on the metal supporting layer exposing from the opening of the insulating layer.
摘要翻译：布线电路基板的制造方法包括以下步骤：制备金属支撑层，在金属支撑层上形成绝缘层以形成开口，在绝缘层和金属支撑层上形成导电薄膜，从绝缘层的开口露出，加热导电薄膜，在形成于绝缘层上的导电薄膜上形成导电图案，并在导电薄膜上形成与导电图案连续的金属连接部分形成在从绝缘层的开口露出的金属支撑层上的膜。

2. 发明申请

US20120124829A1 Producing method of wired circuit board 有权
标题翻译：有线电路板的生产方法
公开(公告)号：US20120124829A1
公开(公告)日：2012-05-24
申请号：US13317648
申请日：2011-10-25
申请人： Katsutoshi Kamei , Yuu Sugimoto , Hitoki Kanagawa
发明人： Katsutoshi Kamei , Yuu Sugimoto , Hitoki Kanagawa
IPC分类号： H05K3/10
CPC分类号： H05K3/421 , G11B5/486 , H05K1/056 , H05K3/108 , H05K2201/09509 , H05K2203/1105 , Y10T29/49002 , Y10T29/49117 , Y10T29/49124 , Y10T29/49155
摘要： A method for producing a wired circuit board includes the steps of preparing a metal supporting layer, forming an insulating layer on the metal supporting layer so as to form an opening, forming a conductive thin film on the insulating layer and on the metal supporting layer that is exposed from the opening of the insulating layer, heating the conductive thin film, forming a conductive pattern on the conductive thin film that is formed on the insulating layer, and forming a metal connecting portion to be continuous to the conductive pattern on the conductive thin film that is formed on the metal supporting layer exposing from the opening of the insulating layer.
摘要翻译：布线电路基板的制造方法包括以下步骤：制备金属支撑层，在金属支撑层上形成绝缘层以形成开口，在绝缘层和金属支撑层上形成导电薄膜，从绝缘层的开口露出，加热导电薄膜，在形成于绝缘层上的导电薄膜上形成导电图案，并在导电薄膜上形成与导电图案连续的金属连接部分形成在从绝缘层的开口露出的金属支撑层上的膜。

3. 发明授权

US08853551B2 Wired circuit board and producing method thereof 有权
标题翻译：有线电路板及其制造方法
公开(公告)号：US08853551B2
公开(公告)日：2014-10-07
申请号：US13067149
申请日：2011-05-12
申请人： Katsutoshi Kamei , Yuu Sugimoto , Kimihide Kitamura
发明人： Katsutoshi Kamei , Yuu Sugimoto , Kimihide Kitamura
IPC分类号： H05K1/03 , H05K1/00 , H05K1/09 , H05K1/11 , H05K1/14
CPC分类号： H05K1/118 , H05K1/147 , H05K2201/0338 , Y10T29/49162
摘要： A wired circuit board includes an insulating layer, and a first conductive pattern and a second conductive pattern formed on the insulating layer. The first conductive pattern includes a first outer terminal on which a metal plating layer is provided, a first inner terminal to be solder connected, and a first wire which connects the first outer terminal and the first inner terminal. The second conductive pattern includes a second outer terminal to be solder connected, a second inner terminal to be solder connected, and a second wire which connects the second outer terminal and the second inner terminal. The first inner terminal and the second inner terminal are arranged in opposed relation with each other so as to be solder connected to the common electric component and preflux processing is performed thereon, and a metal plating layer is provided on the second wire.
摘要翻译：布线电路板包括绝缘层，以及形成在绝缘层上的第一导电图案和第二导电图案。第一导电图案包括设置有金属镀层的第一外部端子，要被焊接的第一内部端子和连接第一外部端子和第一内部端子的第一导线。第二导电图案包括要被焊接的第二外部端子，要被焊接的第二内部端子和连接第二外部端子和第二内部端子的第二导线。第一内端子和第二内端子以彼此相对的关系布置，以便与公共电气部件焊接，并且在其上进行预过程处理，并且金属镀层设置在第二导线上。

4. 发明授权

US08658903B2 Wired circuit board 有权
标题翻译：有线电路板
公开(公告)号：US08658903B2
公开(公告)日：2014-02-25
申请号：US13317365
申请日：2011-10-17
申请人： Katsutoshi Kamei , Kouji Ichinose , Yuu Sugimoto
发明人： Katsutoshi Kamei , Kouji Ichinose , Yuu Sugimoto
IPC分类号： H05K1/00
CPC分类号： H05K3/4092 , G11B5/486 , H05K3/108 , H05K2201/09845
摘要： A wired circuit board includes an insulating base layer, a conductive pattern that is laminated on the insulating base layer, and an insulating cover layer that is laminated on the insulating base layer so as to cover the conductive pattern. The conductive pattern includes, when projected in a laminating direction of the insulating base layer, the conductive pattern, and the insulating cover layer, a terminal portion that is exposed from the insulating base layer and the insulating cover layer. The terminal portion includes an exposed surface that is exposed toward an external terminal side. A protruded portion that protrudes toward the contact direction with the external terminal is formed on the exposed surface.
摘要翻译：布线电路板包括绝缘基底层，层压在绝缘基底层上的导电图案和层叠在绝缘基底层上以覆盖导电图案的绝缘覆盖层。导电图案包括当在绝缘基底层的层压方向上投射导电图案和绝缘覆盖层时，导电图案包括从基底绝缘层和绝缘覆盖层露出的端子部分。端子部分包括暴露的表面，其暴露于外部端子侧。在露出的表面上形成有与外部端子的接触方向突出的突出部。

5. 发明申请

US20120111608A1 Wired circuit board 有权
标题翻译：有线电路板
公开(公告)号：US20120111608A1
公开(公告)日：2012-05-10
申请号：US13317365
申请日：2011-10-17
申请人： Katsutoshi Kamei , Kouji Ichinose , Yuu Sugimoto
发明人： Katsutoshi Kamei , Kouji Ichinose , Yuu Sugimoto
IPC分类号： H05K1/09
CPC分类号： H05K3/4092 , G11B5/486 , H05K3/108 , H05K2201/09845
摘要： A wired circuit board includes an insulating base layer, a conductive pattern that is laminated on the insulating base layer, and an insulating cover layer that is laminated on the insulating base layer so as to cover the conductive pattern. The conductive pattern includes, when projected in a laminating direction of the insulating base layer, the conductive pattern, and the insulating cover layer, a terminal portion that is exposed from the insulating base layer and the insulating cover layer. The terminal portion includes an exposed surface that is exposed toward an external terminal side. A protruded portion that protrudes toward the contact direction with the external terminal is formed on the exposed surface.
摘要翻译：布线电路板包括绝缘基底层，层压在绝缘基底层上的导电图案和层叠在绝缘基底层上以覆盖导电图案的绝缘覆盖层。导电图案包括当在绝缘基底层的层压方向上投射导电图案和绝缘覆盖层时，导电图案包括从基底绝缘层和绝缘覆盖层露出的端子部分。端子部分包括暴露的表面，其暴露于外部端子侧。在露出的表面上形成有与外部端子的接触方向突出的突出部。

6. 发明申请

US20110284274A1 Wired circuit board and producing method thereof 有权
标题翻译：有线电路板及其制造方法
公开(公告)号：US20110284274A1
公开(公告)日：2011-11-24
申请号：US13067149
申请日：2011-05-12
申请人： Katsutoshi Kamei , Yuu Sugimoto , Kimihide Kitamura
发明人： Katsutoshi Kamei , Yuu Sugimoto , Kimihide Kitamura
IPC分类号： H05K1/09 , H05K3/10 , H05K1/00
CPC分类号： H05K1/118 , H05K1/147 , H05K2201/0338 , Y10T29/49162
摘要： A wired circuit board includes an insulating layer, and a first conductive pattern and a second conductive pattern formed on the insulating layer. The first conductive pattern includes a first outer terminal on which a metal plating layer is provided, a first inner terminal to be solder connected, and a first wire which connects the first outer terminal and the first inner terminal. The second conductive pattern includes a second outer terminal to be solder connected, a second inner terminal to be solder connected, and a second wire which connects the second outer terminal and the second inner terminal. The first inner terminal and the second inner terminal are arranged in opposed relation with each other so as to be solder connected to the common electric component and preflux processing is performed thereon, and a metal plating layer is provided on the second wire.
摘要翻译：布线电路板包括绝缘层，以及形成在绝缘层上的第一导电图案和第二导电图案。第一导电图案包括设置有金属镀层的第一外部端子，要被焊接的第一内部端子和连接第一外部端子和第一内部端子的第一导线。第二导电图案包括要被焊接的第二外部端子，要被焊接的第二内部端子和连接第二外部端子和第二内部端子的第二导线。第一内端子和第二内端子以彼此相对的关系布置，以便与公共电气部件焊接，并且在其上进行预过程处理，并且金属镀层设置在第二导线上。

7. 发明授权

US08017874B2 Multi-layered printed circuit board with a conductive substrate and three insulating layers with wiring and ground traces 有权
标题翻译：多层印刷电路板，带导电基板和三层绝缘层，布线和接地迹线
公开(公告)号：US08017874B2
公开(公告)日：2011-09-13
申请号：US12388953
申请日：2009-02-19
申请人： Mitsuru Honjo , Katsutoshi Kamei
发明人： Mitsuru Honjo , Katsutoshi Kamei
IPC分类号： H05K1/00
CPC分类号： H05K1/0248 , G11B5/484 , G11B5/4853 , G11B5/486 , H05K1/0219 , H05K1/0224 , H05K1/0245 , H05K1/0253 , H05K1/056 , H05K2201/09236 , H05K2201/09672 , H05K2201/0969
摘要： A first insulating layer is formed on a suspension body, and a write wiring trace is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer so as to cover the wiring trace. A write wiring trace is formed, above the write wiring trace, on the second insulating layer. A ground trace is formed on one side of the write wiring trace at a distance on the second insulating layer. A third insulating layer is formed on the second insulating layer so as to cover the wiring trace and the ground trace. An opening is formed in a region, below the write wiring trace, of the suspension body.
摘要翻译：在悬架体上形成第一绝缘层，在第一绝缘层上形成写入布线。在第一绝缘层上形成第二绝缘层以覆盖布线迹线。在第二绝缘层上形成写入布线迹线上方的写入布线。在第二绝缘层上一定距离地在写入布线迹线的一侧上形成接地迹线。在第二绝缘层上形成第三绝缘层，以覆盖布线迹线和接地迹线。在悬挂体的写入配线轨迹的下方的区域形成有开口部。

8. 发明授权

US08362365B2 Printed circuit board and method of manufacturing the same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08362365B2
公开(公告)日：2013-01-29
申请号：US12409609
申请日：2009-03-24
申请人： Voonyee Ho , Katsutoshi Kamei
发明人： Voonyee Ho , Katsutoshi Kamei
IPC分类号： H05K1/11 , H05K1/18
CPC分类号： H05K1/0221 , H05K1/0218 , H05K1/056 , H05K3/4647 , H05K2201/09236 , H05K2201/09672 , H05K2203/0733 , Y10T29/49155
摘要： Ground traces are formed to sandwich a write wiring trace. Ground walls are formed on the ground traces. A ground cover is formed so as to couple upper ends of the ground walls. Thus, the ground traces, the ground walls and the ground cover are positioned in a region above and on both sides of the write wiring trace to surround the write wiring trace.
摘要翻译：形成接地迹线以夹住写入线迹。地面上的痕迹形成在地面上。形成地盖以便联接地面壁的上端。因此，接地迹线，接地墙和接地盖位于写入布线迹线的上方和两侧的区域中，以包围写入布线迹线。

9. 发明申请

US20080217048A1 Wired circuit board and producing method thereof 有权
标题翻译：有线电路板及其制造方法
公开(公告)号：US20080217048A1
公开(公告)日：2008-09-11
申请号：US12073193
申请日：2008-03-03
申请人： Katsutoshi Kamei , Takahiko Yokai , Visit Thaveeprungsriporn
发明人： Katsutoshi Kamei , Takahiko Yokai , Visit Thaveeprungsriporn
IPC分类号： H05K1/00 , C23F1/02
CPC分类号： H05K3/243 , H05K1/056 , H05K3/244 , H05K3/28 , H05K3/384 , H05K2201/09472 , H05K2203/0361 , H05K2203/0577
摘要： A wired circuit board includes an insulating base layer, a conductive pattern formed on the insulating base layer and including a wire and a terminal portion, an insulating cover layer formed on the insulating base layer and having an opening portion to expose the terminal portion, and a metal thin film including a protecting portion interposed between the wire and the insulating cover layer, and an exposed portion formed continuously from the protecting portion on a peripheral end portion of the terminal portion exposed from the opening portion.
摘要翻译：布线电路板包括绝缘基底层，形成在绝缘基底层上并包括导线和端子部分的导电图案，形成在绝缘基底层上并具有露出端子部分的开口部分的绝缘覆盖层，以及金属薄膜，其包括插入在所述导线和所述绝缘覆盖层之间的保护部，以及从所述开口部暴露的所述端子部的周缘部从所述保护部连续形成的露出部。

10. 发明授权

US08080740B2 Printed circuit board and method of manufacturing the same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08080740B2
公开(公告)日：2011-12-20
申请号：US12358671
申请日：2009-01-23
申请人： Mitsuru Honjo , Toshiki Naitou , Katsutoshi Kamei
发明人： Mitsuru Honjo , Toshiki Naitou , Katsutoshi Kamei
IPC分类号： H05K1/11
CPC分类号： H05K1/0218 , G11B5/484 , G11B5/486 , H05K1/0237 , H05K1/056 , H05K3/4644 , H05K2201/0723 , H05K2201/09236
摘要： A first insulating layer is formed on a suspension body, and a write wiring trace is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer so as to cover the wiring trace. A ground layer is formed on the second insulating layer so as to be positioned above the wiring trace. Moreover, a third insulating layer is formed on the second insulating layer so as to cover the ground layer. A read wiring trace is formed on the third insulating layer. A fourth insulating layer is formed on the third insulating layer so as to cover the wiring trace.
摘要翻译：在悬架体上形成第一绝缘层，在第一绝缘层上形成写入布线。在第一绝缘层上形成第二绝缘层以覆盖布线迹线。在第二绝缘层上形成接地层，以便位于布线迹线上方。此外，在第二绝缘层上形成第三绝缘层以覆盖接地层。在第三绝缘层上形成读取布线。在第三绝缘层上形成第四绝缘层以覆盖布线迹线。

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