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    • 1. 发明授权
    • Transmit and receive interface array for highly integrated ultrasound scanner
    • 发射和接收接口阵列,用于高度集成的超声波扫描仪
    • US07775979B2
    • 2010-08-17
    • US11172599
    • 2005-06-29
    • Kai E. ThomeniusRobert Gideon WodnickiYe-Ming Li
    • Kai E. ThomeniusRobert Gideon WodnickiYe-Ming Li
    • A61B8/00
    • G10K11/341A61B8/56G01S7/5208
    • An ultrasonic transducer probe having a highly integrated interface circuit array. Low-voltage transmit control signals from the system are transmitted on the system transmit channels via the ultrasound probe cable and into the interface circuit array. These transmit control signals are routed through the interface circuit array using a dense switching matrix. Once the low-voltage transmit control signals reach individual cells within the interface array, they are decoded and used to control local high-voltage pulser circuits to drive individual ultrasound transducer elements made up of selected subelements that are co-integrated with the interface electronics. The interface cell circuitry further comprises a high-voltage transmit/receive switch, which is closed when the high-voltage pulser is transmitting to protect the low-voltage components.
    • 具有高度集成的接口电路阵列的超声换能器探针。 来自系统的低电压发射控制信号通过超声探头电缆在系统发射通道上传输到接口电路阵列中。 这些发送控制信号使用密集的交换矩阵通过接口电路阵列路由。 一旦低压发射控制信号到达接口阵列内的单个小区,就将它们解码并用于控制本地高压脉冲发生器电路,以驱动由与接口电子器件共同集成的选定子元件组成的各个超声换能器元件。 接口单元电路还包括高压发射/接收开关,当高压脉冲发生器正在传输时,该高压发射/接收开关闭合以保护低电压部件。
    • 2. 发明授权
    • Integrated interface electronics for reconfigurable sensor array
    • 用于可重构传感器阵列的集成接口电子设备
    • US07257051B2
    • 2007-08-14
    • US10977930
    • 2004-10-29
    • Kai E. ThomeniusRayette Ann FisherRobert Gideon WodnickiWilliam Edward Burdick, Jr.
    • Kai E. ThomeniusRayette Ann FisherRobert Gideon WodnickiWilliam Edward Burdick, Jr.
    • H04R17/00A61B8/00
    • B06B1/0292G01N29/06G01N29/262G01N2291/106H01L2924/0002H01L2924/00
    • An integrated switch matrix for reconfiguring subelements of a mosaic sensor array to form elements. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect subelements to bus lines and matrix switches that connect subelements to subelements. Each subelement has a unit switch cell comprising at least one access switch, at least one matrix switch, a respective memory element for storing the future state of each switch, and a respective control circuit for each switch. The access and matrix switches are of a type having the ability to memorize control data representing the current switch state of the switch, which control data includes a data bit input to turn-on/off circuits incorporated in the control circuit. The sensor array and the switching matrix may be built in different strata of a co-integrated structure or they may be built on separate wafers that are electrically connected. If the sensors are arranged on a hexagonal grid, the unit switch cells may be arranged on either a hexagonal or rectangular grid.
    • 一种用于重新配置马赛克传感器阵列的子元素以形成元素的集成开关矩阵。 开关矩阵的配置是完全可编程的。 开关矩阵包括将子元件连接到总线线路的接入开关和将子元件连接到子元件的矩阵开关。 每个子元件具有包括至少一个存取开关,至少一个矩阵开关,用于存储每个开关的未来状态的相应存储元件以及每个开关的相应控制电路的单元开关单元。 存取和矩阵开关是具有存储表示开关的当前开关状态的控制数据的能力的类型,该控制数据包括输入到控制电路中的导通/截止电路的数据位。 传感器阵列和开关矩阵可以内置在共同一体化结构的不同层中,或者它们可以被构建在电连接的分开的晶片上。 如果传感器布置在六边形网格上,则单元开关单元可以布置在六边形或矩形网格上。
    • 9. 发明授权
    • Method and apparatus for controlling scanning of mosaic sensor array
    • 用于控制马赛克传感器阵列扫描的方法和装置
    • US07313053B2
    • 2007-12-25
    • US10978012
    • 2004-10-29
    • Robert Gideon Wodnicki
    • Robert Gideon Wodnicki
    • H04R17/00G01S7/521
    • B06B1/0625A61B8/13B06B1/0292H03K17/102H03K17/6874
    • A scanning architecture that makes it possible to update only those ultrasonic transducer subelements of a mosaic transducer array that change from view to view. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect subelements to bus lines and matrix switches that connect subelements to subelements. Each subelement has a unit switch cell associated therewith, each unit switch cell comprising at least one access switch, at least one matrix switch, and addressing and control logic. Optionally, each unit switch cell also includes latches for storing the future switch states of the switches to be programmed. The switches themselves have memory for storing their current switch states.
    • 扫描架构,使得只能更新马赛克换能器阵列的从视图变化到视图的那些超声换能器子元件成为可能。 开关矩阵的配置是完全可编程的。 开关矩阵包括将子元件连接到总线线路的接入开关和将子元件连接到子元件的矩阵开关。 每个子元件具有与其相关联的单元开关单元,每个单元开关单元包括至少一个存取开关,至少一个矩阵开关以及寻址和控制逻辑。 可选地,每个单元开关单元还包括用于存储要编程的开关的未来开关状态的锁存器。 开关本身具有用于存储其当前开关状态的存储器。
    • 10. 发明授权
    • Integrated high-voltage switching circuit for ultrasound transducer array
    • 用于超声换能器阵列的集成高压开关电路
    • US06956426B2
    • 2005-10-18
    • US10988024
    • 2004-11-12
    • Robert Gideon Wodnicki
    • Robert Gideon Wodnicki
    • A61B8/00H03K17/10H03K17/687H03K17/16
    • H03K17/102H03K17/6874
    • An integrated high-voltage switching circuit includes a switch having ON and OFF states and having a parasitic gate capacitance. The switch consists of a pair of DMOS transistors integrated back to back and having a shared gate terminal, the drains of the DMOS transistors being connected to the input and output terminals of the switch respectively. The switching circuit further includes a turn-on circuit comprising a PMOS transistor having its drain connected to the shared gate terminal of the switch via a first diode, having its source connected to a global switch gate bias voltage terminal from which the PMOS transistor draws current, and having its gate electrically coupled to a switch gate control terminal that receives a switch gate control voltage input. The switch transitions from the OFF state to the ON state in response to a first transition of the switch gate control voltage input that causes the PMOS transistor to turn on, and the switch remains in the ON state in response to a second transition of the switch gate control voltage input that causes the PMOS transistor to turn off. The DMOS transistors turn on in response to the shared gate being coupled to the switch gate bias voltage when the PMOS transistor turns on.
    • 集成的高压开关电路包括具有ON和OFF状态并具有寄生栅极电容的开关。 开关由一对背对背集成的DMOS晶体管组成,具有共用栅极端子,DMOS晶体管的漏极分别连接到开关的输入和输出端子。 开关电路还包括导通电路,其包括PMOS晶体管,其PMOS的漏极经由第一二极管连接到开关的共享栅极端子,其源极连接到全局开关栅极偏置电压端子,PMOS晶体管从该栅极偏置电压端子吸取电流 并且其栅极电耦合到接收开关栅极控制电压输入的开关栅极控制端子。 响应于导致PMOS晶体管导通的开关栅极控制电压输入的第一跃迁,开关从OFF状态转变到ON状态,并且开关响应于开关的第二过渡而保持在ON状态 栅极控制电压输入使PMOS晶体管关断。 当PMOS晶体管导通时,DMOS晶体管响应于共享栅极耦合到开关栅极偏置电压而导通。