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1. 发明授权

US10224320B2 Semiconductor device 有权
公开(公告)号：US10224320B2
公开(公告)日：2019-03-05
申请号：US15708289
申请日：2017-09-19
申请人： Kabushiki Kaisha Toshiba
发明人： Fumio Takeuchi
IPC分类号： H01L27/02 , H01L29/78 , H01L29/167 , H01L29/08 , H01L29/10
摘要： A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a plurality of first semiconductor areas provided on the first plane, a plurality of second semiconductor areas provided between the plurality of first semiconductor areas, a plurality of insulator regions provided between the first semiconductor areas and the second semiconductor areas, first-conductivity-type drain regions provided in the first semiconductor areas, first-conductivity-type source regions provided in the second semiconductor areas, gate electrodes, first-conductivity-type first impurity regions that are provided between the first-conductivity-type drain regions and the second plane and have a lower first-conductivity-type impurity concentration than the first-conductivity-type drain regions, and a plurality of second-conductivity-type second impurity regions provided between the first-conductivity-type source regions and the second plane. The width of at least one of the plurality of first semiconductor areas is greater than the width of the other first semiconductor areas.

2. 发明申请

US20180277531A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20180277531A1
公开(公告)日：2018-09-27
申请号：US15708289
申请日：2017-09-19
申请人： Kabushiki Kaisha Toshiba
发明人： Fumio Takeuchi
IPC分类号： H01L27/02 , H01L29/78 , H01L29/10 , H01L29/08 , H01L29/167
CPC分类号： H01L27/027 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/167 , H01L29/7816
摘要： A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a plurality of first semiconductor areas provided on the first plane, a plurality of second semiconductor areas provided between the plurality of first semiconductor areas, a plurality of insulator regions provided between the first semiconductor areas and the second semiconductor areas, first-conductivity-type drain regions provided in the first semiconductor areas, first-conductivity-type source regions provided in the second semiconductor areas, gate electrodes, first-conductivity-type first impurity regions that are provided between the first-conductivity-type drain regions and the second plane and have a lower first-conductivity-type impurity concentration than the first-conductivity-type drain regions, and a plurality of second-conductivity-type second impurity regions provided between the first-conductivity-type source regions and the second plane. The width of at least one of the plurality of first semiconductor areas is greater than the width of the other first semiconductor areas.

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