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1. 发明授权

US09792177B2 Data recovery circuit, semiconductor storage device, and data recovery method 有权
公开(公告)号：US09792177B2
公开(公告)日：2017-10-17
申请号：US14969169
申请日：2015-12-15
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo , Kenji Yoshida
IPC分类号： H03M13/00 , G06F11/10
CPC分类号： G06F11/1068 , G06F11/10 , G06F11/1048
摘要： According to one embodiment, a data recovery circuit includes an XOR operation unit, an erroneous bit position inferring unit, an error factor inferring unit, and an error provisionally determining unit. The XOR operation unit performs a bitwise XOR operation on M data sequences of N bits, where M and N are integers of two or greater. The erroneous bit position inferring unit infers an erroneous bit position based on the XOR operation result. The error factor inferring unit infers the inverted direction of the erroneous bit. The error provisionally determining unit performs bit inversion in the erroneous bit position, the direction of the bit inversion being opposite to the inferred inverted direction.

2. 发明授权

US10649693B2 Hard disk device and method of controlling the same 有权
公开(公告)号：US10649693B2
公开(公告)日：2020-05-12
申请号：US15910396
申请日：2018-03-02
申请人： KABUSHIKI KAISHA TOSHIBA , TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
发明人： Yosuke Kondo , Kana Furuhashi
IPC分类号： G06F3/06 , G06F12/10
摘要： A hard disk device accepts logical block addresses (LBAs) from a host. The hard disk device includes a disk having a plurality of physical sectors from which data is read and to which data is written, and a processor configured to perform read and write operations on the disk in response to read and write commands from the host that designate LBAs. The processor, in response to a request for initialization, does not perform any write operations on the disk, and generates a new mapping of LBAs to the physical sectors for a current generation based on unusable sectors detected during a previous generation, and tracks differences in correspondence between LBAs and the physical sectors between the current generation and the previous generation.

3. 发明授权

US09633691B2 Storage controller, storage device, and method 有权
公开(公告)号：US09633691B2
公开(公告)日：2017-04-25
申请号：US15060935
申请日：2016-03-04
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo , Kenji Yoshida
IPC分类号： G11B5/09 , G11B20/18
CPC分类号： G11B20/1833
摘要： A storage controller includes a control unit and an interface. The control unit, when write data input as data to be written onto a magnetic disk includes a bit string of a first pattern, inverts one or more bits of the bit string. The write data includes a redundancy bit string used for data error correction. The interface outputs write data including bit inverted by the control unit.

4. 发明授权

US09576605B2 Magnetic disk apparatus and method for accessing data sector 有权
标题翻译：用于访问数据扇区的磁盘装置和方法
公开(公告)号：US09576605B2
公开(公告)日：2017-02-21
申请号：US14630496
申请日：2015-02-24
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Takashi Matsuo , Kenji Yoshida , Kazuya Takada , Yosuke Kondo
IPC分类号： G11B20/12 , G11B20/10 , G11B27/10
CPC分类号： G11B20/1217 , G11B20/10 , G11B20/10527 , G11B27/105 , G11B2020/10916 , G11B2020/1221 , G11B2020/1224 , G11B2020/1232 , G11B2020/1238
摘要： A magnetic disk apparatus includes a disk and a controller. The disk includes a plurality of tracks including a first track and a second track that is different from the first track. A plurality of data sectors are located on the tracks. The data sectors include short data sectors and long data sectors, each including a plurality of short data sectors. If the controller accesses a long data sector located at an end of the first track, the controller first accesses a short data sector of the long data sector at the end of the first track, and then accesses a short data sector of the long data sector at the beginning of the second track.
摘要翻译：磁盘装置包括盘和控制器。盘包括多个轨道，其包括与第一轨道不同的第一轨道和第二轨道。多个数据扇区位于轨道上。数据扇区包括短数据扇区和长数据扇区，每个包括多个短数据扇区。如果控制器访问位于第一磁道末端的长数据扇区，则控制器首先访问第一磁道末端的长数据扇区的短数据扇区，然后访问长数据扇区的短数据扇区在第二轨开始。

5. 发明授权

US09280317B2 Semiconductor memory device and random number generator 有权
标题翻译：半导体存储器件和随机数发生器
公开(公告)号：US09280317B2
公开(公告)日：2016-03-08
申请号：US13945186
申请日：2013-07-18
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo
IPC分类号： G06F7/58
CPC分类号： G06F7/584
摘要： According to one embodiment, semiconductor memory device and a random number generator includes A semiconductor memory device includes: a semiconductor memory 30, a random number generator 10 generating a random number sequence, and a data writing unit 20 storing data in the semiconductor memory 30 using the random number sequence. The random number generator 10 includes: a random number generating unit generating an M-bit random number sequence; a coefficient selecting unit outputs a first coefficient or a second coefficient to the random number generating unit; and a bit selecting unit which outputs the random number sequence obtained by selecting N bits from M-bit random number sequence output from the random number generating unit.
摘要翻译：根据一个实施例，半导体存储器件和随机数发生器包括：半导体存储器件，包括：半导体存储器30，产生随机数序列的随机数发生器10以及数据写入单元20，其使用随机数序列。随机数发生器10包括：产生M位随机数序列的随机数生成单元; 系数选择单元向随机数生成单元输出第一系数或第二系数; 以及位选择单元，其输出通过从随机数生成单元输出的M位随机数序列中选择N位而获得的随机数序列。

6. 发明授权

US09413391B2 Chien search device, storage device, and chien search method 有权
标题翻译： Chien搜索设备，存储设备和chien搜索方法
公开(公告)号：US09413391B2
公开(公告)日：2016-08-09
申请号：US14326777
申请日：2014-07-09
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo , Kenji Yoshida , Hidetoshi Tsuneda
IPC分类号： H03M13/00 , H03M13/15
CPC分类号： H03M13/1545 , H03M13/157 , H03M13/158
摘要： According to one embodiment, a chien search device includes n operation units configured to perform exclusive-OR operations, for each of the coefficients. Further, the chien search device includes first register configured to hold operation results of a highest order operation unit, for each of the coefficients. Furthermore, the chien search device includes exclusive-OR operation unit configured to perform exclusive-OR operations of the results of the first exclusive-OR operations of the highest order operation unit, for each of the coefficients. Moreover, the chien search device includes second register configured to hold operation results of the exclusive-OR operation unit, for each of the coefficients. The respective operation units reduce the number of stages of exclusive-OR operations by using the second register values.
摘要翻译：根据一个实施例，搜索设备包括n个操作单元，其被配置为对每个系数执行异或运算。此外，搜索设备包括用于保持每个系数的第一寄存器，其被配置为保持最高阶操作单元的操作结果。此外，搜索设备包括异或运算单元，其被配置为对于每个系数执行最高阶操作单元的第一异或运算的结果的异或运算。此外，搜索设备包括用于为每个系数保存异或运算单元的运算结果的第二寄存器。相应的操作单元通过使用第二寄存器值来减少异或运算的级数。

7. 发明授权

US09092354B2 Storage device, CRC generation device, and CRC generation method 有权
标题翻译：存储设备，CRC生成设备和CRC生成方法
公开(公告)号：US09092354B2
公开(公告)日：2015-07-28
申请号：US14018676
申请日：2013-09-05
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo , Kenji Yoshida
IPC分类号： G06F11/00 , G06F11/10
CPC分类号： G06F11/1008 , G06F11/1004
摘要： According to one embodiment, storage device, a CRC generator device and a CRC generation method includes A storage device includes: a storage unit 1, a data reading unit 2, and a CRC generation device 3. The CRC generation device 3 includes a CRC generation unit 31 generates a first CRC value; an ECC unit 32 detects an error sequence in a reverse order; a CRC reverse operation unit 33 calculates a CRC reverse operation result for the error sequence; a CRC generation shift register group 34 to retain CRC conversion information; an error sequence CRC generation unit 35 obtains a second CRC value; and an XOR unit 36 obtains a CRC value for an errorless recording sequence.
摘要翻译：根据一个实施例，存储装置，CRC发生器装置和CRC生成方法包括：存储装置，包括：存储单元1，数据读取单元2和CRC生成装置3.CCR生成装置3包括CRC生成单元31产生第一CRC值; ECC单元32以相反的顺序检测错误序列; CRC反向操作单元33计算错误序列的CRC反向运算结果; CRC生成移位寄存器组34，用于保留CRC转换信息; 错误序列CRC生成单元35获得第二CRC值; 并且XOR单元36获得无错误记录序列的CRC值。

8. 发明申请

US20150046764A1 RECORDING AND REPRODUCING APPARATUS 审中-公开
标题翻译：记录和再现设备
公开(公告)号：US20150046764A1
公开(公告)日：2015-02-12
申请号：US14142096
申请日：2013-12-27
申请人： Kabushiki Kaisha Toshiba
发明人： Kohsuke HARADA , Akihiro Yamazaki , Yosuke Kondo , Kenji Yoshida , Kazuhito Ichihara , Kazuto Kashiwagi
IPC分类号： G06F11/07
CPC分类号： G11B20/1833 , G06F11/10
摘要： According to one embodiment, a recording and reproducing apparatus includes a first masking unit configured to apply first bit masking to error correction code (ECC) encoded data using a bit sequence for masking, to generate a masked bit sequence to be recorded on a medium, and a de-masking unit configured to apply de-masking, using the bit sequence for masking, to a sequence of decision values based on a signal read from the medium to generate a sequence of de-masked decision values to be ECC decoded. The bit sequence for masking comprises an iteration of a fixed bit sequence of N (>1) bits. The bit de-masking is an inverse process corresponding to the first bit masking.
摘要翻译：根据一个实施例，记录和再现装置包括：第一掩蔽单元，被配置为使用用于掩蔽的比特序列对纠错码（ECC）编码数据应用第一比特掩码，以产生待记录在介质上的掩码比特序列，以及去屏蔽单元，被配置为基于从介质读取的信号，使用掩码用的比特序列对决定值序列应用去掩蔽，以产生要被ECC解码的解掩码的判决值序列。用于掩蔽的比特序列包括N（> 1）比特的固定比特序列的迭代。位去掩蔽是对应于第一位掩蔽的反向处理。

9. 发明申请

US20170040035A1 STORAGE CONTROLLER, STORAGE DEVICE, AND METHOD 有权
标题翻译：存储控制器，存储设备和方法
公开(公告)号：US20170040035A1
公开(公告)日：2017-02-09
申请号：US15060935
申请日：2016-03-04
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo , Kenji Yoshida
IPC分类号： G11B20/18
CPC分类号： G11B20/1833
摘要： A storage controller includes a control unit and an interface. The control unit, when write data input as data to be written onto a magnetic disk includes a bit string of a first pattern, inverts one or more bits of the bit string. The write data includes a redundancy bit string used for data error correction. The interface outputs write data including bit inverted by the control unit.
摘要翻译：存储控制器包括控制单元和接口。当作为要写入磁盘的数据输入的写入数据的写入数据包括第一图案的比特串时，控制单元反转比特串的一个或多个比特。写数据包括用于数据纠错的冗余位串。接口输出包括由控制单元反转的位的写入数据。

10. 发明授权

US08717697B1 Controller, disk drive, and read-back signal processing method 有权
标题翻译：控制器，磁盘驱动器和回读信号处理方法
公开(公告)号：US08717697B1
公开(公告)日：2014-05-06
申请号：US13799082
申请日：2013-03-13
申请人： Kabushiki Kaisha Toshiba
发明人： Yosuke Kondo , Kohsuke Harada , Kenji Yoshida , Akihiro Yamazaki , Kazuhito Ichihara
IPC分类号： G11B20/10 , G11B20/18
CPC分类号： G11B20/10046
摘要： According to one embodiment, there is provided a controller including an interference cancelling module, a boosting module, and a decoding module. The interference cancelling module generates a first correction signal by cancelling an interference component from an adjacent track in a signal read from a target track of a disk medium. The boosting module generates a second correction signal by boosting a low frequency component of a signal corresponding to the first correction signal. The decoding module decodes a signal based on the second correction signal.
摘要翻译：根据一个实施例，提供了一种包括干扰消除模块，升压模块和解码模块的控制器。干扰消除模块通过从从盘介质的目标轨道读取的信号中从相邻轨道中消除干扰分量来产生第一校正信号。升压模块通过升高对应于第一校正信号的信号的低频分量来产生第二校正信号。解码模块基于第二校正信号来解码信号。

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