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    • 2. 发明授权
    • Arrangement for monitoring a two-wire bus line
    • 监控双线总线的安排
    • US5781585A
    • 1998-07-14
    • US419925
    • 1995-04-11
    • Jurgen DornerBernhard RallRoland Haun
    • Jurgen DornerBernhard RallRoland Haun
    • H04L12/24H04L12/26H03B3/46H03B17/00H04Q1/20
    • H04L43/00H04L12/2602H04L43/0811
    • An arrangement for monitoring a two-wire bus line for serial transmission of digital data includes a bus subscriber receiving circuit coupled to the two-wire line and including three comparators each having two inputs and an output for producing a logical output signal in dependence of signals at the two inputs. A signal line voltage on each wire of the two-wire bus line is applied, respectively, to the two inputs of a first one of the comparators and one of the two signal line voltages, an auxiliary voltage is applied, respectively, to the two inputs of a second one of the comparators and the other of the two signal line voltages and an auxiliary voltage being applied, respectively, to the two inputs of a third one of the comparators. A logic circuit is coupled to the outputs of the three comparators for simultaneously receiving the logical output signals of at least the second and third comparators and for signaling a fault-free condition of the bus system if all received logical output signals from the comparators are in agreement, and for signaling a fault if all received logical output signals from the comparators are not in agreement.
    • 用于监视用于数字数据的串行传输的双线总线的装置包括耦合到双线线路的总线用户接收电路,并且包括三个具有两个输入的比较器和用于根据信号产生逻辑输出信号的输出 在两个输入。 分别将两线总线的每条线上的信号线电压施加到比较器的第一个和两个信号线电压中的一个的两个输入端,辅助电压分别施加到两个 比较器中的第二个输入和两个信号线电压中的另一个以及辅助电压分别施加到第三个比较器的两个输入端。 逻辑电路耦合到三个比较器的输出,用于同时接收至少第二和第三比较器的逻辑输出信号,并且用于发信号通知总线系统的无故障状态,如果来自比较器的所有接收到的逻辑输出信号都在 并且如果来自比较器的所有接收到的逻辑输出信号都不一致,则用于发信号通知故障。