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    • 1. 发明授权
    • Non-volatile semiconductor memory device
    • 非易失性半导体存储器件
    • US07420844B2
    • 2008-09-02
    • US11523564
    • 2006-09-20
    • Junichi KatoAkira SugimotoMasayoshi NakayamaNorio Hattori
    • Junichi KatoAkira SugimotoMasayoshi NakayamaNorio Hattori
    • G11C16/06
    • G11C16/28G11C16/0458G11C16/0475G11C16/0491
    • A memory cell array with a group of memory cells capable of retaining two-bit information. Each memory cell has a pair of transistors having charge storage regions, mutually connected gates, and mutually connected sources. Word lines are provided to the gates of the transistors. Bit lines are provided to the sources and drains of the transistors. A pair of the bit lines respectively connected to the drains of a pair of transistors included in a memory cell are connected to a comparison input terminal of the differential detector. An information retained in the memory cell is read based on a comparison result of current amounts inputted to the differential detector via the pair of bit lines obtained by the differential detector in a state where memory cell currents are simultaneously and independently supplied to the pair of transistors.
    • 具有能够保留两位信息的一组存储器单元的存储单元阵列。 每个存储单元具有一对具有电荷存储区域,相互连接的栅极和相互连接的源极的晶体管。 字线被提供给晶体管的栅极。 位线被提供给晶体管的源极和漏极。 分别连接到包含在存储单元中的一对晶体管的漏极的一对位线连接到差分检测器的比较输入端子。 基于在存储单元电流同时且独立地提供给该对晶体管的状态下,通过由差分检测器获得的一对位线,基于输入到差分检测器的电流量的比较结果来读取保存在存储单元中的信息 。
    • 2. 发明申请
    • Non-volatile semiconductor memory device
    • 非易失性半导体存储器件
    • US20070064490A1
    • 2007-03-22
    • US11523564
    • 2006-09-20
    • Junichi KatoAkira SugimotoMasayoshi NakayamaNorio Hattori
    • Junichi KatoAkira SugimotoMasayoshi NakayamaNorio Hattori
    • G11C16/06
    • G11C16/28G11C16/0458G11C16/0475G11C16/0491
    • A memory cell array comprises a group of memory cells capable of retaining two-bit information. The memory cell has a pair of transistors having charge storage regions and arranged along a row direction of the memory cell array. Word lines are provided between the memory cells adjacent to each other along a column direction of the memory cell array and extend along the row direction. Bit lines are provided between the transistors adjacent to each other along the row direction and extend along the column direction. Gates of the pair of transistors constituting the respective memory cells are connected to each other and further connected to the word line corresponding to the relevant memory cell. Sources of the pair of transistors are connected to each other and further connected to the bit lines provided between the relevant pair of transistors. Drains of the transistors facing each other between the both memory cells adjacent to each other along the row direction are connected to each other and further connected to the bit line provided between the relevant adjacent memory cells. A pair of the bit lines connected to the both drains of the pairs of transistors included in all of the memory cells are connected to a comparison input terminal of the differential detector. An information retained in the memory cell is read based on a comparison result of current amounts inputted to the differential detector via the pair of bit lines obtained by the differential detector in a state where memory cell currents are simultaneously and independently supplied to the pair of transistors.
    • 存储单元阵列包括能够保留两位信息的一组存储单元。 存储单元具有一对具有电荷存储区并且沿着存储单元阵列的行方向布置的晶体管。 字线被设置在沿着存储单元阵列的列方向彼此相邻的存储单元之间并且沿着行方向延伸。 位线沿着行方向设置在彼此相邻的晶体管之间并且沿列方向延伸。 构成各个存储单元的一对晶体管的栅极彼此连接并进一步连接到与相关存储单元对应的字线。 一对晶体管的源极彼此连接并且进一步连接到设置在相关晶体管对之间的位线。 在沿着行方向彼此相邻的两个存储单元之间彼此面对的晶体管的漏极彼此连接,并进一步连接到设置在相邻的相邻存储单元之间的位线。 连接到包括在所有存储单元中的晶体管对的两个漏极的一对位线连接到差分检测器的比较输入端子。 基于在存储单元电流同时且独立地提供给该对晶体管的状态下,通过由差分检测器获得的一对位线,基于输入到差分检测器的电流量的比较结果来读取保存在存储单元中的信息 。
    • 9. 发明授权
    • Image forming apparatus
    • 图像形成装置
    • US07925174B2
    • 2011-04-12
    • US12570332
    • 2009-09-30
    • Masayoshi NakayamaShinichi AkatsuTomohide TakenakaTakuma Higa
    • Masayoshi NakayamaShinichi AkatsuTomohide TakenakaTakuma Higa
    • G03G15/08
    • G03G15/5058G03G15/0131G03G15/0848G03G15/5041G03G2215/00059G03G2215/00776G03G2215/0607
    • An image forming apparatus includes a latent image carrier, a developing unit to develop a latent image on the image carrier with developer including toner and carrier, a developer bearing member, a first detector to detect a toner adhesion amount per unit area of a toner image developed by the developing unit, a second detector to detect humidity, and a controller to calculate an index indicating toner chargeability of the carrier based on detection results of the toner adhesion amount obtained by the first detector and perform a given control process based on calculation results thereof and including a data storage unit to store an algorithm to correct the index to a specific value according to a specific humidity, based on detection results of the humidity obtained by the second detector. The controller corrects the index obtained based on the amount of toner adhesion based on the algorithm.
    • 图像形成装置包括潜像载体,显影单元,用于在具有调色剂和载体的显影剂的图像载体上显影潜像,显影剂承载部件,第一检测器,用于检测调色剂图像的每单位面积的调色剂附着量 由显影单元显影,第二检测器检测湿度,以及控制器,基于由第一检测器获得的调色剂附着量的检测结果,计算载体的调色剂带电性的指标,并根据计算结果进行给定的控制处理 并且包括数据存储单元,其基于由第二检测器获得的湿度的检测结果,存储根据特定湿度将索引校正到特定值的算法。 控制器基于算法校正基于调色剂附着量获得的指数。