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1. 发明申请

US20070167030A1 Method of forming an insulation structure and method of manufacturing a semiconductor device using the same 有权
标题翻译：绝缘结构的形成方法及其制造方法
公开(公告)号：US20070167030A1
公开(公告)日：2007-07-19
申请号：US11639164
申请日：2006-12-15
申请人： Jung-Geun Jee , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
发明人： Jung-Geun Jee , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
IPC分类号： H01L21/31
CPC分类号： H01L21/3144 , H01L21/0217 , H01L21/022 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/31662 , H01L27/115 , H01L27/11521
摘要： In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform.
摘要翻译：在形成绝缘结构的方法中，通过至少一个氧化工艺在物体上形成至少一个氧化物层，然后通过至少一个硝化工艺从氧化物层形成至少一个氮化物层。绝缘结构的边缘部分可以具有与绝缘结构的中心部分的厚度基本相同的厚度，使得绝缘结构可以具有均匀的厚度和改善的绝缘特性。当采用绝缘结构作为半导体器件的隧道绝缘层时，由于半导体器件中的单元的阈值电压分布可能变得均匀，所以半导体器件可以具有增强的耐久性和改善的电特性。

2. 发明授权

US08481387B2 Method of forming an insulation structure and method of manufacturing a semiconductor device using the same 有权
标题翻译：绝缘结构的形成方法及其制造方法
公开(公告)号：US08481387B2
公开(公告)日：2013-07-09
申请号：US13188587
申请日：2011-07-22
申请人： Jung-Geun Jee , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
发明人： Jung-Geun Jee , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/3144 , H01L21/0217 , H01L21/022 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/31662 , H01L27/115 , H01L27/11521
摘要： In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform.
摘要翻译：在形成绝缘结构的方法中，通过至少一个氧化工艺在物体上形成至少一个氧化物层，然后通过至少一个硝化工艺从氧化物层形成至少一个氮化物层。绝缘结构的边缘部分可以具有与绝缘结构的中心部分的厚度基本相同的厚度，使得绝缘结构可以具有均匀的厚度和改善的绝缘特性。当采用绝缘结构作为半导体器件的隧道绝缘层时，由于半导体器件中的单元的阈值电压分布可能变得均匀，所以半导体器件可以具有增强的耐久性和改善的电特性。

3. 发明授权

US08008214B2 Method of forming an insulation structure and method of manufacturing a semiconductor device using the same 有权
标题翻译：绝缘结构的形成方法及其制造方法
公开(公告)号：US08008214B2
公开(公告)日：2011-08-30
申请号：US11639164
申请日：2006-12-15
申请人： Jung-Geun Jee , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
发明人： Jung-Geun Jee , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
IPC分类号： H01L21/31 , H01L21/461
CPC分类号： H01L21/3144 , H01L21/0217 , H01L21/022 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/31662 , H01L27/115 , H01L27/11521
摘要： In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform.
摘要翻译：在形成绝缘结构的方法中，通过至少一个氧化工艺在物体上形成至少一个氧化物层，然后通过至少一个硝化工艺从氧化物层形成至少一个氮化物层。绝缘结构的边缘部分可以具有与绝缘结构的中心部分的厚度基本相同的厚度，使得绝缘结构可以具有均匀的厚度和改善的绝缘特性。当采用绝缘结构作为半导体器件的隧道绝缘层时，由于半导体器件中的单元的阈值电压分布可能变得均匀，所以半导体器件可以具有增强的耐久性和改善的电特性。

4. 发明申请

US20110275190A1 METHOD OF FORMING AN INSULATION STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME 有权
标题翻译：形成绝缘结构的方法及使用其制造半导体器件的方法
公开(公告)号：US20110275190A1
公开(公告)日：2011-11-10
申请号：US13188587
申请日：2011-07-22
申请人： Jung-Geun JEE , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
发明人： Jung-Geun JEE , Young-Jin Noh , Bon-Young Koo , Chul-Sung Kim , Hun-Hyeoung Leam , Woong Lee
IPC分类号： H01L21/762
CPC分类号： H01L21/3144 , H01L21/0217 , H01L21/022 , H01L21/02238 , H01L21/02252 , H01L21/02255 , H01L21/02332 , H01L21/02337 , H01L21/0234 , H01L21/31662 , H01L27/115 , H01L27/11521
摘要： In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform.
摘要翻译：在形成绝缘结构的方法中，通过至少一个氧化工艺在物体上形成至少一个氧化物层，然后通过至少一个硝化工艺从氧化物层形成至少一个氮化物层。绝缘结构的边缘部分可以具有与绝缘结构的中心部分的厚度基本相同的厚度，使得绝缘结构可以具有均匀的厚度和改善的绝缘特性。当采用绝缘结构作为半导体器件的隧道绝缘层时，由于半导体器件中的单元的阈值电压分布可能变得均匀，所以半导体器件可以具有增强的耐久性和改善的电特性。

5. 发明申请

US20080090354A1 Method of Manufacturing a Non-Volatile Memory Device 失效
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20080090354A1
公开(公告)日：2008-04-17
申请号：US11868195
申请日：2007-10-05
申请人： Sung-Kweon Baek , Bon-Young Koo , Chul-Sung Kim , Jung-Geun Jee , Young-Jin Noh
发明人： Sung-Kweon Baek , Bon-Young Koo , Chul-Sung Kim , Jung-Geun Jee , Young-Jin Noh
IPC分类号： H01L21/336
CPC分类号： H01L29/7881 , H01L21/28273 , H01L21/28282 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/4234 , H01L29/792
摘要： A method of manufacturing a non-volatile memory device, includes forming a tunnel isolation layer comprising an oxynitride on a substrate by a simultaneous oxidation and nitridation treatment in which an oxidation process and a nitridation process are simultaneously performed using a processing gas including oxygen and nitrogen. The method further includes performing first and second heat treatments to remove defect sites from the tunnel isolation layer in gas atmospheres including nitrogen (N) and chlorine (Cl), respectively and forming a gate structure on the tunnel isolation layer after the second heat treatment, and forming source/drain regions at surface portions of the substrate adjacent to the gate structure.
摘要翻译：一种制造非易失性存储器件的方法包括通过同时氧化和氮化处理在衬底上形成包含氧氮化物的隧道隔离层，其中使用包括氧和氮的处理气体同时进行氧化过程和氮化处理。该方法还包括进行第一和第二热处理以分别在包括氮（N）和氯（Cl）的气体环境中从隧道隔离层去除缺陷位点，并在第二热处理之后在隧道隔离层上形成栅结构，以及在与栅极结构相邻的衬底的表面部分处形成源极/漏极区域。

6. 发明授权

US07585729B2 Method of manufacturing a non-volatile memory device 失效
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US07585729B2
公开(公告)日：2009-09-08
申请号：US11868195
申请日：2007-10-05
申请人： Sung-Kweon Baek , Bon-Young Koo , Chul-Sung Kim , Jung-Geun Jee , Young-Jin Noh
发明人： Sung-Kweon Baek , Bon-Young Koo , Chul-Sung Kim , Jung-Geun Jee , Young-Jin Noh
IPC分类号： H01L21/00
CPC分类号： H01L29/7881 , H01L21/28273 , H01L21/28282 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/4234 , H01L29/792
摘要： A method of manufacturing a non-volatile memory device, includes forming a tunnel isolation layer comprising an oxynitride on a substrate by a simultaneous oxidation and nitridation treatment in which an oxidation process and a nitridation process are simultaneously performed using a processing gas including oxygen and nitrogen. The method further includes performing first and second heat treatments to remove defect sites from the tunnel isolation layer in gas atmospheres including nitrogen (N) and chlorine (Cl), respectively and forming a gate structure on the tunnel isolation layer after the second heat treatment, and forming source/drain regions at surface portions of the substrate adjacent to the gate structure.
摘要翻译：一种制造非易失性存储器件的方法包括通过同时氧化和氮化处理在衬底上形成包含氧氮化物的隧道隔离层，其中使用包括氧和氮的处理气体同时进行氧化过程和氮化处理。该方法还包括进行第一和第二热处理以分别在包括氮（N）和氯（Cl）的气体环境中从隧道隔离层去除缺陷位点，并在第二热处理之后在隧道隔离层上形成栅结构，以及在与栅极结构相邻的衬底的表面部分处形成源极/漏极区域。

7. 发明申请

US20080085584A1 OXIDATION/HEAT TREATMENT METHODS OF MANUFACTURING NON-VOLATILE MEMORY DEVICES 审中-公开
标题翻译：制造非易失性存储器件的氧化/热处理方法
公开(公告)号：US20080085584A1
公开(公告)日：2008-04-10
申请号：US11857824
申请日：2007-09-19
申请人： Young-Jin Noh , Chul-Sung Kim , Si-Young Choi , Bon-Young Koo , Ki-Hyun Hwang , Sung-Kweon Baek
发明人： Young-Jin Noh , Chul-Sung Kim , Si-Young Choi , Bon-Young Koo , Ki-Hyun Hwang , Sung-Kweon Baek
IPC分类号： H01L21/336
CPC分类号： H01L21/28247 , H01L29/40114
摘要： Methods of manufacturing non-volatile memory devices are disclosed which may at least partially cure etch damage and may at least partially remove defect sites in gate structures of the devices caused during manufacturing of the devices. An exemplary method of manufacturing a non-volatile memory device includes forming a gate structure on a substrate, the gate structure including a control gate electrode, a blocking layer pattern, a floating gate electrode, and a tunnel insulating layer pattern. An oxidation process is performed that at least partially cures damage caused to the substrate and to the gate structure during formation of the gate structure. A first heat treatment is performed under a gas atmosphere including nitrogen to at least partially remove defect sites on the gate structure caused by the oxidation process. A second heat treatment is performed under a gas atmosphere including chlorine to at least partially remove remaining defect sites on the gate structure caused by the oxidation process.
摘要翻译：公开了制造非易失性存储器件的方法，其可以至少部分地固化蚀刻损伤，并且可以至少部分地去除在器件的制造期间引起的器件的栅极结构中的缺陷位置。制造非易失性存储器件的示例性方法包括在衬底上形成栅极结构，栅极结构包括控制栅电极，阻挡层图案，浮栅电极和隧道绝缘层图案。进行氧化处理，其至少部分地固化在栅极结构形成期间对衬底和栅极结构的损伤。在包括氮气的气体气氛下进行第一热处理，以至少部分地去除由氧化过程引起的栅极结构上的缺陷部位。在包括氯的气体气氛下进行第二热处理，以至少部分地去除由氧化过程引起的栅极结构上的剩余缺陷部位。

8. 发明授权

US07608509B2 Method of manufacturing a flash memory device having compensation members formed on edge portions of a tunnel oxide layer 有权
标题翻译：制造具有形成在隧道氧化物层的边缘部分上的补偿部件的闪存装置的方法
公开(公告)号：US07608509B2
公开(公告)日：2009-10-27
申请号：US11494439
申请日：2006-07-27
申请人： Chul-Sung Kim , Yu-Gyun Shin , Bon-Young Koo , Sung-Kweon Baek , Young-Jin Noh
发明人： Chul-Sung Kim , Yu-Gyun Shin , Bon-Young Koo , Sung-Kweon Baek , Young-Jin Noh
IPC分类号： H01L21/336 , H01L29/788
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42336
摘要： In a semiconductor device and a method of manufacturing the semiconductor device, preliminary isolation regions having protruded upper portions are formed on a substrate to define an active region. After an insulation layer is formed on the active region, a first conductive layer is formed on the insulation layer. The protruded upper portions of the preliminary isolation regions are removed to form isolation regions on the substrate and to expose sidewalls of the first conductive layer, and compensation members are formed on edge portions of the insulation layer. The compensation members may complement the edge portions of the insulation layer that have thicknesses substantially thinner than that of a center portion of the insulation layer, and may prevent deterioration of the insulation layer. Furthermore, the first conductive layer having a width substantially greater than that of the active region may enhance a coupling ratio of the semiconductor device. Thus, the semiconductor device may have improved electrical characteristics and reliability.
摘要翻译：在半导体器件和半导体器件的制造方法中，在衬底上形成具有突出的上部的预备隔离区以限定有源区。在有源区上形成绝缘层之后，在绝缘层上形成第一导电层。去除预分离区域的突出的上部，以在衬底上形成隔离区域并暴露第一导电层的侧壁，并且补偿构件形成在绝缘层的边缘部分上。补偿构件可以补充绝缘层的边缘部分，该边缘部分的厚度基本上比绝缘层的中心部分的厚度更薄，并且可以防止绝缘层的劣化。此外，具有基本上大于有源区的宽度的第一导电层可以增强半导体器件的耦合比。因此，半导体器件可以具有改善的电特性和可靠性。

9. 发明申请

US20070026655A1 Method of manufacturing a semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20070026655A1
公开(公告)日：2007-02-01
申请号：US11489985
申请日：2006-07-20
申请人： Chul-Sung Kim , Yu-Gyun Shin , Bon-Young Koo , Ji-Hyun Kim , Young-Jin Noh
发明人： Chul-Sung Kim , Yu-Gyun Shin , Bon-Young Koo , Ji-Hyun Kim , Young-Jin Noh
IPC分类号： H01L21/473
CPC分类号： H01L27/115 , H01L27/11521
摘要： In a method of manufacturing a semiconductor device for use in such applications as a flash memory device, a field insulating pattern defines an opening that exposes an active region of a semiconductor substrate. The field insulating pattern includes a first portion protruding from the substrate and a second portion buried in the substrate. An oxide layer is formed on the active region by an oxidation process using a reactive plasma including an oxygen radical and a conductive layer is then formed on the oxide layer to sufficiently fill up the opening. The oxide layer is formed by an oxidation reaction of a surface portion of the active region with the oxygen radical having a relatively low activation energy, resulting in an improved thickness uniformity of the oxide layer. As a result, various performance characteristics of the semiconductor device when used in flash memory and similar applications are improved.
摘要翻译：在制造用于诸如闪速存储器件的应用中的半导体器件的方法中，场绝缘图案限定了露出半导体衬底的有源区的开口。场绝缘图案包括从基板突出的第一部分和埋在基板中的第二部分。通过使用包含氧自由基的反应性等离子体的氧化工艺在有源区上形成氧化物层，然后在氧化物层上形成导电层以充分填充开口。通过活性区域的表面部分与具有相对较低的活化能的氧自由基的氧化反应形成氧化物层，从而改善氧化物层的厚度均匀性。结果，改善了当用于闪速存储器和类似应用时半导体器件的各种性能特性。

10. 发明授权

US08008154B2 Methods of forming impurity containing insulating films and flash memory devices including the same 失效
标题翻译：形成含杂质的绝缘膜的方法和包括其的闪存器件的方法
公开(公告)号：US08008154B2
公开(公告)日：2011-08-30
申请号：US12188482
申请日：2008-08-08
申请人： Young-Jin Noh , Bon-Young Koo , Si-Young Choi , Ki-Hyun Hwang , Chul-Sung Kim , Sung-Kweon Baek , Jin-Hwa Heo
发明人： Young-Jin Noh , Bon-Young Koo , Si-Young Choi , Ki-Hyun Hwang , Chul-Sung Kim , Sung-Kweon Baek , Jin-Hwa Heo
IPC分类号： H01L21/336
CPC分类号： H01L29/42324 , H01L21/0214 , H01L21/02238 , H01L21/02255 , H01L21/02332 , H01L21/02337 , H01L21/28273 , H01L21/3145 , H01L21/31662
摘要： Methods of forming an insulating film include forming an insulating film on a substrate. A first impurity is injected into the insulating film using a thermal process under a first set of processing conditions to form a first impurity concentration peak in a lower portion of the insulating film. A second impurity is injected into the insulating film using the thermal process under a second set of processing conditions, different from the first set of processing conditions, to form a second impurity concentration peak in an upper portion of the insulating film. Injecting the first impurity and injecting the second impurity may be carried out without using plasma and the first impurity concentration peak may be higher than the second impurity concentration peak.
摘要翻译：形成绝缘膜的方法包括在基板上形成绝缘膜。使用第一组处理条件下的热处理将第一杂质注入绝缘膜，以在绝缘膜的下部形成第一杂质浓度峰。在与第一组处理条件不同的第二组处理条件下，使用热处理将第二杂质注入到绝缘膜中，以在绝缘膜的上部形成第二杂质浓度峰。注入第一杂质并注入第二杂质可以在不使用等离子体的情况下进行，并且第一杂质浓度峰可以高于第二杂质浓度峰。

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