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    • 4. 发明授权
    • Matrix display and driving method therefor
    • 矩阵显示及其驱动方法
    • US4532506A
    • 1985-07-30
    • US427585
    • 1982-09-29
    • Masaaki KitazimaHideaki Kawakami
    • Masaaki KitazimaHideaki Kawakami
    • G02F1/133G09F9/30G09G3/20G09G3/36G09G3/30
    • G09G3/3655G09G3/3648G09G2300/0842
    • A matrix display comprises: a plurality of picture cells generally arranged in a matrix, the picture cells being defined by a plurality of first electrodes arranged on a first substrate and at least one common electrode arranged on a second substrate and a display medium held therebetween; a plurality of first signal lines and a plurality of second signal lines crossing to the first signal lines, arranged on at least one of the first and second substrates; a plurality of first semiconductor switches each having a control terminal, a first main terminal and a second main terminal, a plurality of second semiconductor switches each having a control terminal, a first main terminal and a second main terminal, and a plurality of storage means, arranged at respective crosspoints of the first signal lines and the second signal lines; each of the first signal lines being connected to the control terminal of the associated one of the first semiconductor switches and the first main terminal of the associated one of the second semiconductor switches; each of the second signal lines being connected to the first main terminal of the associated one of the first semiconductor switches; each of the second main terminals of the first semiconductor switches being connected to the associated one of the storage means and the control terminal of the associated one of the second semiconductor switches; and each of the second main terminals of the second semiconductor switches being connected to the associated one of the first electrodes.
    • 矩阵显示器包括:通常以矩阵布置的多个图形单元,所述图像单元由布置在第一基板上的多个第一电极和布置在第二基板上的至少一个公共电极和保持在其间的显示介质限定; 多个第一信号线和与第一信号线交叉的多个第二信号线,布置在第一和第二基板中的至少一个上; 多个第一半导体开关,每个具有控制端子,第一主端子和第二主端子,多个具有控制端子,第一主端子和第二主端子的第二半导体开关,以及多个存储装置 ,布置在第一信号线和第二信号线的相应交叉点处; 每个第一信号线连接到第一半导体开关中的相关联的一个的控制端子和相关联的第二半导体开关的第一主端子; 每个第二信号线连接到相关联的一个第一半导体开关的第一主端子; 第一半导体开关的第二主端子中的每一个连接到相关联的一个第二半导体开关的存储装置和控制端子中的相关联的一个; 并且第二半导体开关的第二主端子中的每一个连接到相关的一个第一电极。