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1. 发明申请

US20070128799A1 METHOD OF FABRICATING FLASH MEMORY 审中-公开
标题翻译：制作闪速存储器的方法
公开(公告)号：US20070128799A1
公开(公告)日：2007-06-07
申请号：US11669163
申请日：2007-01-31
申请人： Jui-Yu Pan , Cheng-Yuan Hsu , I-Chun Chuang , Chih-Wei Hung
发明人： Jui-Yu Pan , Cheng-Yuan Hsu , I-Chun Chuang , Chih-Wei Hung
IPC分类号： H01L21/336 , H01L29/94
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/7782
摘要： A method for fabricating a flash memory is described. A mask layer having openings to expose a portion of the substrate is formed on the substrate. A tunneling dielectric layer is formed at the bottom surface of the openings. Conductive spacers are formed on the sidewalls of the openings. The conductive spacers are patterned to form a plurality of floating gates. A plurality of buried doped regions is formed in the substrate under the bottom surface of the openings. An inter-gate dielectric layer is formed over the substrate. A plurality of control gates is formed over the substrate to fill the openings. The mask layer is removed to form a plurality of memory units. A plurality of source regions and drain regions are formed in the substrate beside the memory units.
摘要翻译：描述了一种用于制造闪速存储器的方法。在基板上形成具有露出基板的一部分的开口的掩模层。在开口的底表面处形成隧道电介质层。导电间隔件形成在开口的侧壁上。将导电间隔物图案化以形成多个浮动栅极。在开口底面下方的基板中形成多个掩埋掺杂区域。栅极间电介质层形成在衬底上。多个控制栅极形成在衬底上以填充开口。去除掩模层以形成多个存储单元。在存储单元旁边的基板中形成多个源极区域和漏极区域。

2. 发明授权

US07196371B2 Flash memory 失效
标题翻译：闪存
公开(公告)号：US07196371B2
公开(公告)日：2007-03-27
申请号：US11161994
申请日：2005-08-25
申请人： Jui-Yu Pan , Cheng-Yuan Hsu , I-Chun Chuang , Chih-Wei Hung
发明人： Jui-Yu Pan , Cheng-Yuan Hsu , I-Chun Chuang , Chih-Wei Hung
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/7782
摘要： A method for fabricating a flash memory is described. A mask layer having openings to expose a portion of the substrate is formed on the substrate. A tunneling dielectric layer is formed at the bottom surface of the openings. Conductive spacers are formed on the sidewalls of the openings. The conductive spacers are patterned to form a plurality of floating gates. A plurality of buried doped regions is formed in the substrate under the bottom surface of the openings. An inter-gate dielectric layer is formed over the substrate. A plurality of control gates is formed over the substrate to fill the openings. The mask layer is removed to form a plurality of memory units. A plurality of source regions and drain regions are formed in the substrate beside the memory units.
摘要翻译：描述了一种用于制造闪速存储器的方法。在基板上形成具有露出基板的一部分的开口的掩模层。在开口的底表面处形成隧道电介质层。导电间隔件形成在开口的侧壁上。将导电间隔物图案化以形成多个浮动栅极。在开口底面下方的基板中形成多个掩埋掺杂区域。栅极间电介质层形成在衬底上。多个控制栅极形成在衬底上以填充开口。去除掩模层以形成多个存储单元。在存储单元旁边的基板中形成多个源极区域和漏极区域。

3. 发明申请

US20060175654A1 FLASH MEMORY 失效
标题翻译：闪存
公开(公告)号：US20060175654A1
公开(公告)日：2006-08-10
申请号：US11161994
申请日：2005-08-25
申请人： Jui-Yu Pan , Cheng-Yuan Hsu , I-Chun Chuang , Chih-Wei Hung
发明人： Jui-Yu Pan , Cheng-Yuan Hsu , I-Chun Chuang , Chih-Wei Hung
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/7782
摘要： A method for fabricating a flash memory is described. A mask layer having openings to expose a portion of the substrate is formed on the substrate. A tunneling dielectric layer is formed at the bottom surface of the openings. Conductive spacers are formed on the sidewalls of the openings. The conductive spacers are patterned to form a plurality of floating gates. A plurality of buried doped regions is formed in the substrate under the bottom surface of the openings. An inter-gate dielectric layer is formed over the substrate. A plurality of control gates is formed over the substrate to fill the openings. The mask layer is removed to form a plurality of memory units. A plurality of source regions and drain regions are formed in the substrate beside the memory units.
摘要翻译：描述了一种用于制造闪速存储器的方法。在基板上形成具有露出基板的一部分的开口的掩模层。在开口的底表面处形成隧道电介质层。导电间隔件形成在开口的侧壁上。将导电间隔物图案化以形成多个浮动栅极。在开口底面下方的基板中形成多个掩埋掺杂区域。栅极间电介质层形成在衬底上。多个控制栅极形成在衬底上以填充开口。去除掩模层以形成多个存储单元。在存储单元旁边的基板中形成多个源极区域和漏极区域。

4. 发明申请

US20080090355A1 MANUFACTURING METHOD OF FLASH MEMORY 审中-公开
标题翻译：闪存存储器的制造方法
公开(公告)号：US20080090355A1
公开(公告)日：2008-04-17
申请号：US11955348
申请日：2007-12-12
申请人： I-Chun Chuang , Cheng-Yuan Hsu , Jui-Yu Pan
发明人： I-Chun Chuang , Cheng-Yuan Hsu , Jui-Yu Pan
IPC分类号： H01L21/336
CPC分类号： H01L29/7887 , H01L27/115 , H01L27/11521 , H01L29/40114 , H01L29/42324
摘要： A method for manufacturing flash memory is provided. A tunneling dielectric layer, a conductive layer and a patterned mask layer that exposes a portion of the conductive layer are formed on a substrate. An oxide layer is formed on the exposed conductive layer so that the conductive layer is partitioned through the oxide layer into blocks. The oxide layer is removed and an inter-gate dielectric layer is formed in the opening. A control gate that completely fills the opening is formed. A cap layer is formed over the control gate. The mask layer is then removed. Using the cap layer as a mask, a portion of the conductive layer is removed to form two floating gates under the control gate. An insulating layer is formed on the substrate. Source/drain regions are formed in the substrate on the respective sides of the control gate.
摘要翻译：提供一种制造闪存的方法。在基板上形成有隧道电介质层，导电层和露出导电层的一部分的图案化掩模层。在暴露的导电层上形成氧化物层，使得导电层通过氧化物层分隔成块。去除氧化物层，并在开口中形成栅极间电介质层。形成完全填充开口的控制门。盖层形成在控制栅上。然后去除掩模层。使用盖层作为掩模，去除导电层的一部分以在控制栅极下方形成两个浮栅。在基板上形成绝缘层。源极/漏极区域形成在控制栅极的相应侧上的衬底中。

5. 发明申请

US20060275985A1 FLASH MEMORY AND MANUFACTURING METHOD THEREOF 有权
标题翻译：闪存及其制造方法
公开(公告)号：US20060275985A1
公开(公告)日：2006-12-07
申请号：US11307010
申请日：2006-01-19
申请人： I-Chun Chuang , Cheng-Yuan Hsu , Jui-Yu Pan
发明人： I-Chun Chuang , Cheng-Yuan Hsu , Jui-Yu Pan
IPC分类号： H01L21/336
CPC分类号： H01L29/7887 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A method for manufacturing flash memory is provided. A tunneling dielectric layer, a conductive layer and a patterned mask layer that exposes a portion of the conductive layer are formed on a substrate. An oxide layer is formed on the exposed conductive layer so that the conductive layer is partitioned through the oxide layer into blocks. The oxide layer is removed and an inter-gate dielectric layer is formed in the opening. A control gate that completely fills the opening is formed. A cap layer is formed over the control gate. The mask layer is then removed. Using the cap layer as a mask, a portion of the conductive layer is removed to form two floating gates under the control gate. An insulating layer is formed on the substrate. Source/drain regions are formed in the substrate on the respective sides of the control gate.
摘要翻译：提供一种制造闪存的方法。在基板上形成有隧道电介质层，导电层和露出导电层的一部分的图案化掩模层。在暴露的导电层上形成氧化物层，使得导电层通过氧化物层分隔成块。去除氧化物层，并在开口中形成栅极间电介质层。形成完全填充开口的控制门。盖层形成在控制栅上。然后去除掩模层。使用盖层作为掩模，去除导电层的一部分以在控制栅极下方形成两个浮栅。在基板上形成绝缘层。源极/漏极区域形成在控制栅极的相应侧上的衬底中。

6. 发明授权

US07335940B2 Flash memory and manufacturing method thereof 有权
标题翻译：闪存及其制造方法
公开(公告)号：US07335940B2
公开(公告)日：2008-02-26
申请号：US11307010
申请日：2006-01-19
申请人： I-Chun Chuang , Cheng-Yuan Hsu , Jui-Yu Pan
发明人： I-Chun Chuang , Cheng-Yuan Hsu , Jui-Yu Pan
IPC分类号： H01L29/788
CPC分类号： H01L29/7887 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A method for manufacturing flash memory is provided. A tunneling dielectric layer, a conductive layer and a patterned mask layer that exposes a portion of the conductive layer are formed on a substrate. An oxide layer is formed on the exposed conductive layer so that the conductive layer is partitioned through the oxide layer into blocks. The oxide layer is removed and an inter-gate dielectric layer is formed in the opening. A control gate that completely fills the opening is formed. A cap layer is formed over the control gate. The mask layer is then removed. Using the cap layer as a mask, a portion of the conductive layer is removed to form two floating gates under the control gate. An insulating layer is formed on the substrate. Source/drain regions are formed in the substrate on the respective sides of the control gate.
摘要翻译：提供一种制造闪存的方法。在基板上形成有隧道电介质层，导电层和露出导电层的一部分的图案化掩模层。在暴露的导电层上形成氧化物层，使得导电层通过氧化物层分隔成块。去除氧化物层，并在开口中形成栅极间电介质层。形成完全填充开口的控制门。盖层形成在控制栅上。然后去除掩模层。使用盖层作为掩模，去除导电层的一部分以在控制栅极下方形成两个浮栅。在基板上形成绝缘层。源极/漏极区域形成在控制栅极的相应侧上的衬底中。

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