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    • 1. 发明授权
    • Error check-only mode
    • 错误检查模式
    • US08749565B2
    • 2014-06-10
    • US12950239
    • 2010-11-19
    • Joseph P. BrattPeter F. HollandDavid L. Bowman
    • Joseph P. BrattPeter F. HollandDavid L. Bowman
    • G06T1/60
    • G09G5/397G09G5/36G09G2330/12G09G2340/0407G09G2340/06G09G2340/10G09G2340/125G09G2360/10G09G2360/125
    • Video display pipes may terminate with a FIFO (first-in first-out) buffer from which pixels are provided to a display controller to display the pixels on a graphics/video display. The display pipes may frequently process the pixels at a much higher rate than at which the display controller fetches the pixels from the FIFO buffer. In an error-checking only mode, the FIFO may be disabled, and an error-checking (e.g. CRC) block connected in front of the FIFO may receive the pixels processed by the display pipes as fast as the display pipes are capable of processing the pixels. Accordingly, the length of test/simulation time required to perform a test may be determined by the rate at which pixels are generated rather than the rate at which the display controller displays the pixels. It also becomes possible to perform testing/simulation in environments where a display is not supported or is not available. The results generated by the error-checking may be read and compared to an expected value to detect test pass/fail conditions.
    • 视频显示管道可以用FIFO(先进先出)缓冲器终止,从而将像素提供给显示控制器以在图形/视频显示器上显示像素。 显示管道可以以比显示控制器从FIFO缓冲器提取像素的速率高得多的速率来频繁地处理像素。 在仅错误检查模式中,FIFO可以被禁用,并且连接在FIFO前面的错误校验(例如CRC)块可以像显示管能够处理显示管一样快地接收由显示管处理的像素 像素。 因此,执行测试所需的测试/模拟时间的长度可以由生成像素的速率而不是显示控制器显示像素的速率来确定。 在不支持显示或不可用的环境中也可以进行测试/模拟。 可以读取错误检查产生的结果并将其与期望值进行比较,以检测测试通过/失败条件。
    • 2. 发明申请
    • Error Check-Only Mode
    • 错误检查模式
    • US20120127187A1
    • 2012-05-24
    • US12950239
    • 2010-11-19
    • Joseph P. BrattPeter F. HollandDavid L. Bowman
    • Joseph P. BrattPeter F. HollandDavid L. Bowman
    • G09G5/36
    • G09G5/397G09G5/36G09G2330/12G09G2340/0407G09G2340/06G09G2340/10G09G2340/125G09G2360/10G09G2360/125
    • Video display pipes may terminate with a FIFO (first-in first-out) buffer from which pixels are provided to a display controller to display the pixels on a graphics/video display. The display pipes may frequently process the pixels at a much higher rate than at which the display controller fetches the pixels from the FIFO buffer. In an error-checking only mode, the FIFO may be disabled, and an error-checking (e.g. CRC) block connected in front of the FIFO may receive the pixels processed by the display pipes as fast as the display pipes are capable of processing the pixels. Accordingly, the length of test/simulation time required to perform a test may be determined by the rate at which pixels are generated rather than the rate at which the display controller displays the pixels. It also becomes possible to perform testing/simulation in environments where a display is not supported or is not available. The results generated by the error-checking may be read and compared to an expected value to detect test pass/fail conditions.
    • 视频显示管道可以用FIFO(先进先出)缓冲器终止,从而将像素提供给显示控制器以在图形/视频显示器上显示像素。 显示管道可以以比显示控制器从FIFO缓冲器提取像素的速率高得多的速率来频繁地处理像素。 在仅错误检查模式中,FIFO可以被禁用,并且连接在FIFO前面的错误校验(例如CRC)块可以像显示管能够处理显示管一样快地接收由显示管处理的像素 像素。 因此,执行测试所需的测试/模拟时间的长度可以由生成像素的速率而不是显示控制器显示像素的速率来确定。 在不支持显示或不可用的环境中也可以进行测试/模拟。 可以读取错误检查产生的结果并将其与期望值进行比较,以检测测试通过/失败条件。
    • 4. 发明授权
    • Edge alphas for image translation
    • 边缘图像翻译
    • US08711170B2
    • 2014-04-29
    • US13026559
    • 2011-02-14
    • Joseph P. BrattPeter F. HollandGokhan Avkarogullari
    • Joseph P. BrattPeter F. HollandGokhan Avkarogullari
    • G09G5/02
    • G06T15/005G06T13/80G06T15/503
    • A video display pipe used for processing pixels of video and/or image frames may include edge Alpha registers for storing edge Alpha values corresponding to the edges of an image to be translated across a display screen. The edge Alpha values may be specified based on the fractional pixel value by which the image is to be moved in the current frame. The video pipe may copy the column and row of pixels that are in the direction of travel, and may apply the edge Alpha values to the copied column and row. The edge Alpha values may control blending of the additional column and row of the translated image with the adjacent pixels in the original frame, providing the effect of the partial pixel movement, simulating a sub-pixel rate of movement.
    • 用于处理视频和/或图像帧的像素的视频显示管可以包括边缘Alpha寄存器,用于存储与通过显示屏幕翻译的图像的边缘相对应的边缘α值。 可以基于在当前帧中移动图像的分数像素值来指定边缘Alpha值。 视频管道可以复制行进方向的像素列和行,并且可以将边缘Alpha值应用于复制的列和行。 边缘Alpha值可以控制翻转图像的附加列和行与原始帧中的相邻像素的混合,从而提供部分像素移动的效果,模拟子像素移动速率。
    • 5. 发明申请
    • Reproducible Dither-noise Injection
    • 可重现的抖动噪声注入
    • US20120206657A1
    • 2012-08-16
    • US13026557
    • 2011-02-14
    • Joseph P. BrattPeter F. Holland
    • Joseph P. BrattPeter F. Holland
    • H04N9/64
    • H04N9/646G06F7/584G09G2320/0271
    • A display pipe unit for processing pixels of video and/or image frames may be injected with dither-noise during processing of the pixels. A random noise generator implemented using Linear Feedback Shift Registers (LFSRs) produces pseudo-random numbers that are injected into the display pipe as dither-noise. Typically, such LFSRs shift freely during operation and the values of the LFSRs are used as needed. By shifting the LFSRs when the values are used to inject noise into newly received data, and not shifting the LFSRs when no new data is received, variations in the delays of receiving the data do not affect the pattern of noise applied to the frames. Therefore, dither-noise can be deterministically injected into the display pipe during testing/debug operation. By updating the LFSRs when new pixel data is available from the host interface instead of updating the LFSRs every cycle, the same dither-noise can be injected for the same received data.
    • 用于处理视频和/或图像帧的像素的显示管单元可以在处理像素期间被注入抖动噪声。 使用线性反馈移位寄存器(LFSR)实现的随机噪声发生器产生作为抖动噪声注入显示管道的伪随机数。 通常,这样的LFSR在操作期间自由移动,并且根据需要使用LFSR的值。 当使用这些值将噪声注入到新接收到的数据中时,通过移位LFSR,并且在没有接收到新数据时不移动LFSR,接收数据的延迟的变化不影响施加到帧的噪声模式。 因此,在测试/调试操作期间,可以将抖动噪声确定性地注入显示管道。 当从主机接口获得新像素数据而不是每个周期更新LFSR时,通过更新LFSR,可以为相同的接收数据注入相同的抖动噪声。
    • 6. 发明申请
    • Edge Alphas for Image Translation
    • 边缘阿尔法图像翻译
    • US20120206468A1
    • 2012-08-16
    • US13026559
    • 2011-02-14
    • Joseph P. BrattPeter F. HollandGokhan Avkarogullari
    • Joseph P. BrattPeter F. HollandGokhan Avkarogullari
    • G09G5/36
    • G06T15/005G06T13/80G06T15/503
    • A video display pipe used for processing pixels of video and/or image frames may include edge Alpha registers for storing edge Alpha values corresponding to the edges of an image to be translated across a display screen. The edge Alpha values may be specified based on the fractional pixel value by which the image is to be moved in the current frame. The video pipe may copy the column and row of pixels that are in the direction of travel, and may apply the edge Alpha values to the copied column and row. The edge Alpha values may control blending of the additional column and row of the translated image with the adjacent pixels in the original frame, providing the effect of the partial pixel movement, simulating a sub-pixel rate of movement.
    • 用于处理视频和/或图像帧的像素的视频显示管可以包括边缘Alpha寄存器,用于存储与通过显示屏幕翻译的图像的边缘相对应的边缘α值。 可以基于在当前帧中移动图像的分数像素值来指定边缘Alpha值。 视频管道可以复制行进方向的像素列和行,并且可以将边缘Alpha值应用于复制的列和行。 边缘Alpha值可以控制翻转图像的附加列和行与原始帧中的相邻像素的混合,从而提供部分像素移动的效果,模拟子像素移动速率。
    • 8. 发明授权
    • User interface pipe scalers with active regions
    • 用户界面管道缩放器与活动区域
    • US08717391B2
    • 2014-05-06
    • US12950267
    • 2010-11-19
    • Joseph P. BrattPeter F. Holland
    • Joseph P. BrattPeter F. Holland
    • G09G5/00G06F13/00G09G5/02
    • G09G5/024G09G5/022G09G5/14G09G5/363G09G5/397
    • A display pipe may include fetch circuitry and a scaler unit, and registers programmable with information that defines active regions of an image frame. Pixels within the active regions are active pixels to be displayed, pixels outside of the active regions are inactive pixels not to be displayed. The fetch circuitry may retrieve frames from memory, retrieving the active pixels and not retrieving the inactive pixels as defined by the programmed contents of the registers. A scaler unit may produce scaled pixels from the fetched pixels, basing each scaled pixel on a respective corresponding set of pixels. When a given pixel of the respective corresponding set of pixels is an inactive pixel, the scaler unit may assign an estimated value to the given pixel based on one or more active pixels in the respective corresponding set of pixels. The scaler unit may provide the scaled pixels to a blend unit for blending with other pixels.
    • 显示管可以包括提取电路和缩放器单元,并且可以用定义图像帧的有效区域的信息来编程。 活动区域内的像素是要显示的活动像素,活动区域之外的像素是不显示的不活动像素。 提取电路可以从存储器检索帧,检索有效像素,而不检索由寄存器的编程内容定义的非活动像素。 缩放器单元可以从获取的像素产生缩放的像素,将每个缩放的像素基于相应的相应的像素集。 当相应的相应像素集合的给定像素是非活动像素时,缩放器单元可以基于相应的相应像素集合中的一个或多个有效像素来分配给定像素的估计值。 缩放器单元可以将缩放的像素提供给用于与其他像素混合的混合单元。
    • 9. 发明申请
    • User Interface Pipe Scalers with Active Regions
    • 用户界面活动区域的管道定标器
    • US20120127193A1
    • 2012-05-24
    • US12950267
    • 2010-11-19
    • Joseph P. BrattPeter F. Holland
    • Joseph P. BrattPeter F. Holland
    • G09G5/02G09G5/00
    • G09G5/024G09G5/022G09G5/14G09G5/363G09G5/397
    • A display pipe may include fetch circuitry and a scaler unit, and registers programmable with information that defines active regions of an image frame. Pixels within the active regions are active pixels to be displayed, pixels outside of the active regions are inactive pixels not to be displayed. The fetch circuitry may retrieve frames from memory, retrieving the active pixels and not retrieving the inactive pixels as defined by the programmed contents of the registers. A scaler unit may produce scaled pixels from the fetched pixels, basing each scaled pixel on a respective corresponding set of pixels. When a given pixel of the respective corresponding set of pixels is an inactive pixel, the scaler unit may assign an estimated value to the given pixel based on one or more active pixels in the respective corresponding set of pixels. The scaler unit may provide the scaled pixels to a blend unit for blending with other pixels.
    • 显示管可以包括提取电路和缩放器单元,并且可以用定义图像帧的有效区域的信息来编程。 活动区域内的像素是要显示的活动像素,活动区域之外的像素是不显示的不活动像素。 提取电路可以从存储器检索帧,检索有效像素,而不检索由寄存器的编程内容定义的非活动像素。 缩放器单元可以从获取的像素产生缩放的像素,将每个缩放的像素基于相应的相应的像素集。 当相应的相应像素集合的给定像素是非活动像素时,缩放器单元可以基于相应的相应像素集合中的一个或多个有效像素来分配给定像素的估计值。 缩放器单元可以将缩放的像素提供给用于与其他像素混合的混合单元。
    • 10. 发明授权
    • Color space conversion
    • 色彩空间转换
    • US08773457B2
    • 2014-07-08
    • US12950185
    • 2010-11-19
    • Joseph P. BrattPeter F. Holland
    • Joseph P. BrattPeter F. Holland
    • G09G5/02H04N9/67
    • H04N9/67G09G2340/06
    • A display pipe may include a video pipe outputting pixels of a video stream in a first color space, e.g. YCbCr color space. The display pipe may also include a first color space converter to convert the output pixels to a second color space, e.g. to RGB color space, producing a conversion output in which some of the converted output pixels have values that are invalid pixel values in the second color space. The display pipe may also include a blend unit that performs blending operations in the second color space on the converted output pixels to produce a blended conversion output that includes blended pixels in the second color space. A second color space converter in the display pipe may convert the blended pixels from the second color space to the first color space, and correctly display the converted blended pixels on a display screen.
    • 显示管可以包括输出第一颜色空间中的视频流的像素的视频管,例如。 YCbCr颜色空间。 显示管还可以包括第一颜色空间转换器,以将输出像素转换为第二颜色空间,例如, 到RGB颜色空间,产生转换输出,其中一些转换的输出像素具有在第二颜色空间中的无效像素值的值。 显示管还可以包括混合单元,其在转换的输出像素上的第二颜色空间中执行混合操作,以产生包括第二颜色空间中的混合像素的混合转换输出。 显示管中的第二颜色空间转换器可以将混合像素从第二颜色空间转换为第一颜色空间,并将转换的混合像素正确显示在显示屏上。