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1. 发明授权

US5572704A System and method for controlling split-level caches in a multi-processor system including data loss and deadlock prevention schemes 失效
标题翻译：用于控制多处理器系统中的分级缓存的系统和方法，包括数据丢失和死锁预防方案
公开(公告)号：US5572704A
公开(公告)日：1996-11-05
申请号：US167005
申请日：1993-12-15
申请人： Joseph P. Bratt , John Brennan , Peter Y. Hsu , William A. Huffman , Joseph T. Scanlon , Steve Ciavagia
发明人： Joseph P. Bratt , John Brennan , Peter Y. Hsu , William A. Huffman , Joseph T. Scanlon , Steve Ciavagia
IPC分类号： G06F12/08 , G06F12/16
CPC分类号： G06F12/0811
摘要： A method for preventing data loss and deadlock in a multi-processor computer system wherein at least one processor in the computer system includes a split-level cache. The split-level cache has a byte-writable first-level and a word-writable second level. The method monitors the second level cache to determine if a forced atomic (FA) instruction is in a second level cache pipeline. If an FA instruction is determined to be in the second level cache pipeline, then interventions to the second level cache are delayed until the FA instruction exits the second level cache pipeline. In this manner data written by operation of cache memory access instruction that cause the interventions is not destroyed by the execution of the FA instruction, thereby preventing data loss. The method also monitors the second level cache pipeline to determine if a possible miss (PM) instruction is in the second level cache pipeline. If a PM instruction is determined to be in the second level cache pipeline, the FA instructions are prevented from entering the second level cache pipeline such that execution of interventions to the second level cache is not prevented when an instruction in the second level cache may be detained to process an intervention in its behalf, thereby preventing deadlock between processing units of the computer system.
摘要翻译：一种用于在多处理器计算机系统中防止数据丢失和死锁的方法，其中所述计算机系统中的至少一个处理器包括分级高速缓存。分级缓存具有可写字节的第一级和可写字的第二级。该方法监视第二级高速缓存以确定强制原子（FA）指令是否在二级高速缓存流水线中。如果FA指令被确定在第二级高速缓存流水线中，则延迟到第二级高速缓存的干预，直到FA指令退出第二级高速缓存流水线。以这种方式，通过执行FA指令不会破坏导致干预的高速缓冲存储器访问指令的操作所写入的数据，从而防止数据丢失。该方法还监视第二级高速缓存流水线以确定可能的未命中（PM）指令是否在第二级高速缓存流水线中。如果确定PM指令处于第二级高速缓存流水线中，则FA指令被阻止进入第二级高速缓存流水线，使得当第二级高速缓存中的指令可能为被拘留以代表其进行干预，从而防止计算机系统的处理单元之间的僵局。

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