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1. 发明授权

US4803654A Circular first-in, first out buffer system for generating input and output addresses for read/write memory independently 失效
标题翻译：循环先进先出缓冲系统，用于独立生成读/写存储器的输入和输出地址
公开(公告)号：US4803654A
公开(公告)日：1989-02-07
申请号：US747095
申请日：1985-06-20
申请人： Joseph D. Rasberry , Karl D. Nitschke
发明人： Joseph D. Rasberry , Karl D. Nitschke
IPC分类号： G06F5/10 , G06F12/02
CPC分类号： G06F5/10
摘要： A circulating FIFO buffer eliminates the need to move the data through the register and relies instead on input and output counters to load data into the register and read data therefrom. Apparatus comprises an addressable read/write memory, an input counter and an output counter, both of which address the memory, means for resetting the counters, means for enabling the input counter to increment and to load data into the buffer, means for enabling the output counter after a predetermined amount of data has been loaded into the buffer, means for disabling the input counter when the buffer register has been loaded and means for detecting when the outputs of the output and input counters are equal and for activating the resetting means upon detecting such equality.
摘要翻译：循环FIFO缓冲器不需要通过寄存器移动数据，而是依靠输入和输出计数器将数据加载到寄存器中并从中读取数据。装置包括可寻址读/写存储器，输入计数器和输出计数器，两者都对存储器寻址，用于复位计数器的装置，用于使输入计数器增加并将数据加载到缓冲器的装置，在预定量的数据被加载到缓冲器之后的输出计数器，当缓冲寄存器被加载时禁止输入计数器的装置和用于检测输出和输入计数器的输出何时相等并用于激活复位装置的装置检测这种平等。

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