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1. 发明申请

US20080178183A1 Scheduling Threads In A Multi-Processor Computer 有权
标题翻译：在多处理器计算机中调度线程
公开(公告)号：US20080178183A1
公开(公告)日：2008-07-24
申请号：US12055179
申请日：2008-03-25
申请人： Jos Manuel Accapadi , Herman Dietrich Dierks , Andrew Dunshea , Dirk Michel
发明人： Jos Manuel Accapadi , Herman Dietrich Dierks , Andrew Dunshea , Dirk Michel
IPC分类号： G06F9/46
CPC分类号： G06F9/4812
摘要： Scheduling threads in a multi-processor computer system including establishing an interrupt threshold for a thread, where the interrupt threshold represents a maximum permissible number of interrupts during thread execution on a processor; executing the thread on a current processor, where the thread has thread affinity for one or more processors including the current processor; counting a number of interrupts during execution of the thread on the current processor; and removing thread affinity for the current processor in dependence upon the counted number of interrupts and the interrupt threshold.
摘要翻译：在多处理器计算机系统中调度线程，包括建立线程的中断阈值，其中中断阈值表示在处理器上的线程执行期间的最大允许中断次数; 在当前处理器上执行线程，其中线程对于包括当前处理器的一个或多个处理器具有线程亲和性; 在当前处理器上的线程执行期间对多个中断进行计数; 并根据计数的中断次数和中断阈值去除当前处理器的线程亲和度。

2. 发明授权

US08037203B2 User defined preferred DNS reference 失效
标题翻译：用户定义的首选DNS参考
公开(公告)号：US08037203B2
公开(公告)日：2011-10-11
申请号：US10782668
申请日：2004-02-19
申请人： Jos Manuel Accapadi , Mathew Accapadi , William Lee Britton , Andrew Dunshea , Dirk Michel
发明人： Jos Manuel Accapadi , Mathew Accapadi , William Lee Britton , Andrew Dunshea , Dirk Michel
IPC分类号： G06F15/173
CPC分类号： H04L61/1511
摘要： Methods, systems, and products are disclosed for user defined preferred DNS routing that include mapping for a user in a data communications application a domain name of a network host to a network address for a preferred DNS server, wherein the preferred DNS server has a network address for the domain name; receiving from the user a request for access to a resource accessible through the network host; and routing to the preferred DNS server a DNS request for the network address of the network host, the DNS request including the domain name of the network host. In typical embodiments, mapping a domain name to a network address for a preferred DNS server is carried out by storing, through the data communication application, the domain name in association with the network address for a preferred DNS server in a data structure in computer memory.
摘要翻译：公开了用于用户定义的优选DNS路由的方法，系统和产品，其包括将数据通信应用中的用户映射到网络主机的域名到优选DNS服务器的网络地址，其中优选DNS服务器具有网络地址为域名; 从用户接收对通过网络主机可访问的资源的访问请求; 并将首选DNS服务器路由到网络主机的网络地址的DNS请求，DNS请求包括网络主机的域名。在典型的实施例中，将域名映射到优选DNS服务器的网络地址是通过数据通信应用与计算机存储器中的数据结构中的优选DNS服务器的网络地址相关联地存储域名来执行的。

3. 发明申请

US20080148274A1 Scheduling Compatible Threads in a Simultaneous Multi-Threading Processor Using Cycle Per Instruction Value Occurred During Identified Time Interval 有权
标题翻译：在同一个多线程处理器中调度兼容的线程使用周期每个指令值在确定的时间间隔期间发生
公开(公告)号：US20080148274A1
公开(公告)日：2008-06-19
申请号：US12036804
申请日：2008-02-25
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srivivas
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srivivas
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F2209/483
摘要： Identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.
摘要翻译：通过计算在SMT处理器上运行两个线程时发生的性能指标（例如每个指令周期（CPI））来提供在同时多线程（SMT）处理器环境中识别兼容线程。确定在两个线程在SMT处理器上执行时实现的CPI。如果实现的CPI优于兼容性阈值，则记录指示兼容性的信息。当线程即将完成时，调度程序将查看完成线程所属的运行队列，以调度另一个线程。调度程序标识（1）与SMT处理器上仍然运行的线程（即，即将完成的线程）兼容的线程，以及（2）准备执行。持续更新CPI数据，以便不断地识别彼此兼容的线程。

4. 发明授权

US07278141B2 System and method for adding priority change value corresponding with a lock to a thread during lock processing 失效
标题翻译：用于在锁处理期间将与锁相对应的优先级更改值添加到线程的系统和方法
公开(公告)号：US07278141B2
公开(公告)日：2007-10-02
申请号：US10422037
申请日：2003-04-23
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , James W. Van Fleet
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , James W. Van Fleet
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F9/4881
摘要： A system and method is altering the priority of a process, or thread of execution, when the process acquires a software lock. The priority is altered when the lock is acquired and restored when the process releases the lock. Thread priorities can be altered for every lock being managed by the operating system or can selectively be altered. In addition, the amount of alteration can be individually adjusted so that a process that acquires one lock receive a different priority boost than a process that acquires a different lock. Furthermore, a method of tuning a computer system by adjusting lock priority values is provided.
摘要翻译：当进程获取软件锁时，系统和方法正在改变进程的优先级或执行的线程。当获取锁定时，优先级会更改，并在进程释放锁定时恢复。可以对由操作系统管理的每个锁进行线程优先级改变，或者可以有选择地改变。此外，可以单独调整更改量，使得获取一个锁的进程与获取不同锁的进程接收到不同的优先级提升。此外，提供了通过调整锁定优先级值来调整计算机系统的方法。

5. 发明授权

US07676808B2 System and method for CPI load balancing in SMT processors 失效
标题翻译： SMT处理器中CPI负载平衡的系统和方法
公开(公告)号：US07676808B2
公开(公告)日：2010-03-09
申请号：US11955503
申请日：2007-12-13
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srinivas
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/46
CPC分类号： G06F9/5083
摘要： A system and method for scheduling threads in a Simultaneous Multithreading (SMT) processor environment utilizing multiple SMT processors is provided. Poor performing threads that are being run on each of the SMT processors are identified. After being identified, the poor performing threads are moved to a different SMT processor. Data is captured regarding the performance of threads. In one embodiment, this data includes each threads' CPI value. When a thread is moved, data regarding the thread and its performance at the time it was moved is recorded along with a timestamp. The data regarding previous moves is used to determine whether a thread's performance is improved following the move.
摘要翻译：提供了一种利用多个SMT处理器的同时多线程（SMT）处理器环境中调度线程的系统和方法。识别在每个SMT处理器上运行的执行不良线程。被识别后，执行不良的线程被移动到不同的SMT处理器。捕获关于线程性能的数据。在一个实施例中，该数据包括每个线程的CPI值。当线程移动时，与线程及其在移动时的性能相关的数据与时间戳一起被记录。关于先前移动的数据用于确定线程的性能是否随着移动而改善。

6. 发明申请

US20080163217A1 Optimized Preemption and Reservation of Software Locks 失效
标题翻译：优化抢占和预订软件锁
公开(公告)号：US20080163217A1
公开(公告)日：2008-07-03
申请号：US12049304
申请日：2008-03-15
申请人： Jos Manuel Accapadi , Matthew Accapadi , Andrew Dunshea , Dirk Michel
发明人： Jos Manuel Accapadi , Matthew Accapadi , Andrew Dunshea , Dirk Michel
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F2209/522
摘要： An approach is provided that reserves a software lock for a waiting thread is presented. When a software lock is released by a first thread, a second thread that is waiting for the same resource controlled by the software lock is woken up. In addition, a reservation to the software lock is established for the second thread. After the reservation is established, if the lock is available and requested by a thread other than the second thread, the requesting thread is denied, added to the wait queue, and put to sleep. In addition, the reservation is cleared. After the reservation has been cleared, the lock will be granted to the next thread to request the lock.
摘要翻译：提供了一种保留用于等待线程的软件锁的方法。当软件锁由第一个线程释放时，等待软件锁定的相同资源的第二个线程被唤醒。另外，针对第二线程建立对软件锁定的预约。在建立预留之后，如果第二线程之外的线程可用并请求该锁，则请求线程被拒绝，被添加到等待队列中并进入休眠状态。此外，预订已被清除。预订清除后，锁将被授予下一个线程以请求锁定。

7. 发明授权

US07380247B2 System for delaying priority boost in a priority offset amount only after detecting of preemption event during access to critical section 有权
标题翻译：用于仅在检测到关键部分的访问期间的抢占事件之前延迟优先级偏移量中的优先级提升的系统
公开(公告)号：US07380247B2
公开(公告)日：2008-05-27
申请号：US10626192
申请日：2003-07-24
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , James W. Van Fleet
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , James W. Van Fleet
IPC分类号： G06F13/18 , G06F13/00
CPC分类号： G06F9/52 , G06F9/4818
摘要： A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.
摘要翻译：提供了一种用于延迟执行线程的优先级提升的系统和方法。当线程准备进入代码的关键部分时，例如当线程利用共享系统资源时，更新用户模式可访问数据区域，指示线程处于关键部分，并且如果内核接收到抢占事件，线程应该接收的优先级提升。如果内核在线程完成关键部分之前收到抢占事件，则内核将代表线程应用优先级提升。通常，线程将完成关键部分，而无需实际提升优先级。如果线程确实接收到实际的优先级提升，那么在关键部分完成之后，内核会将线程的优先级重置为正常级别。

8. 发明授权

US08261279B2 Optimized preemption and reservation of software locks for woken threads 失效
标题翻译：优化抢占线程的软件锁的抢占和预留
公开(公告)号：US08261279B2
公开(公告)日：2012-09-04
申请号：US12049304
申请日：2008-03-15
申请人： Jos Manuel Accapadi , Matthew Accapadi , Andrew Dunshea , Dirk Michel
发明人： Jos Manuel Accapadi , Matthew Accapadi , Andrew Dunshea , Dirk Michel
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F2209/522
摘要： An approach is provided that reserves a software lock for a waiting thread is presented. When a software lock is released by a first thread, a second thread that is waiting for the same resource controlled by the software lock is woken up. In addition, a reservation to the software lock is established for the second thread. After the reservation is established, if the lock is available and requested by a thread other than the second thread, the requesting thread is denied, added to the wait queue, and put to sleep. In addition, the reservation is cleared. After the reservation has been cleared, the lock will be granted to the next thread to request the lock.
摘要翻译：提供了一种保留用于等待线程的软件锁的方法。当软件锁由第一个线程释放时，等待软件锁定的相同资源的第二个线程被唤醒。另外，针对第二线程建立对软件锁定的预约。在建立预留之后，如果第二线程之外的线程可用并请求该锁，则请求线程被拒绝，被添加到等待队列中并进入休眠状态。此外，预订已被清除。预订清除后，锁将被授予下一个线程以请求锁定。

9. 发明授权

US07360218B2 System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval 有权
标题翻译：用于在同步多线程处理器中调度兼容线程的系统和方法，使用在指定时间间隔期间的每个指令值周期
公开(公告)号：US07360218B2
公开(公告)日：2008-04-15
申请号：US10671132
申请日：2003-09-25
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srinivas
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/455 , G06F9/46 , G06F9/00 , G06F9/30
CPC分类号： G06F9/4881 , G06F2209/483
摘要： A system and method for identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.
摘要翻译：通过计算在SMT处理器上运行两个线程时发生的性能指标（例如每个指令周期（CPI）），可以提供用于在同时多线程（SMT）处理器环境中识别兼容线程的系统和方法。确定在两个线程在SMT处理器上执行时实现的CPI。如果实现的CPI优于兼容性阈值，则记录指示兼容性的信息。当线程即将完成时，调度程序将查看完成线程所属的运行队列，以调度另一个线程。调度程序标识（1）与SMT处理器上仍然运行的线程（即，即将完成的线程）兼容的线程，以及（2）准备执行。持续更新CPI数据，以便不断地识别彼此兼容的线程。

10. 发明授权

US08132178B2 System and method for delayed priority boost 失效
标题翻译：用于延迟优先级提升的系统和方法
公开(公告)号：US08132178B2
公开(公告)日：2012-03-06
申请号：US11943649
申请日：2007-11-21
申请人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , James W. Van Fleet
发明人： Jos Manuel Accapadi , Andrew Dunshea , Dirk Michel , James W. Van Fleet
IPC分类号： G06F9/46
CPC分类号： G06F9/52 , G06F9/4818
摘要： A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.
摘要翻译：提供了一种用于延迟执行线程的优先级提升的系统和方法。当线程准备进入代码的关键部分时，例如当线程利用共享系统资源时，更新用户模式可访问数据区域，指示线程处于关键部分，并且如果内核接收到抢占事件，线程应该接收的优先级提升。如果内核在线程完成关键部分之前收到抢占事件，则内核将代表线程应用优先级提升。通常，线程将完成关键部分，而无需实际提升优先级。如果线程确实接收到实际的优先级提升，那么在关键部分完成之后，内核会将线程的优先级重置为正常级别。

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