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1. 发明授权

US07791160B2 High-performance FET device layout 失效
标题翻译：高性能FET器件布局
公开(公告)号：US07791160B2
公开(公告)日：2010-09-07
申请号：US11923919
申请日：2007-10-25
申请人： Jonghae Kim , Sungjae Lee , Jean-Olivier Plouchart , Scott Keith Springer
发明人： Jonghae Kim , Sungjae Lee , Jean-Olivier Plouchart , Scott Keith Springer
IPC分类号： H01L29/786
CPC分类号： H01L27/0207 , H01L21/84 , H01L29/4238
摘要： A fast FET, a method and system for designing the fast FET and a design structure of the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.
摘要翻译：一种用于设计快速FET的快速FET，方法和系统以及快速FET的设计结构。该方法包括：选择场效应晶体管的参考设计，场效应晶体管包括源极，漏极，源极和漏极之间的沟道，沟道上的栅电极，至少一个源极和源极所述至少一个源极接触件与所述栅电极隔开第一距离，所述至少一个漏极接触件与所述栅电极间隔开第二距离; 并且调整第一距离和第二距离以最大化场效应晶体管的性能参数以产生用于场效应晶体管的快速设计。

2. 发明申请

US20090108349A1 HIGH-PERFORMANCE FET DEVICE LAYOUT 失效
标题翻译：高性能FET器件布局
公开(公告)号：US20090108349A1
公开(公告)日：2009-04-30
申请号：US11923919
申请日：2007-10-25
申请人： Jonghae Kim , Sungjae Lee , Jean-Olivier Plouchart , Scott Keith Springer
发明人： Jonghae Kim , Sungjae Lee , Jean-Olivier Plouchart , Scott Keith Springer
IPC分类号： H01L29/786
CPC分类号： H01L27/0207 , H01L21/84 , H01L29/4238
摘要： A fast FET, a method and system for designing the fast FET and a design structure of the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.
摘要翻译：一种用于设计快速FET的快速FET，方法和系统以及快速FET的设计结构。该方法包括：选择场效应晶体管的参考设计，场效应晶体管包括源极，漏极，源极和漏极之间的沟道，沟道上的栅电极，至少一个源极和源极所述至少一个源极接触件与所述栅电极隔开第一距离，所述至少一个漏极接触件与所述栅电极间隔开第二距离; 并且调整第一距离和第二距离以最大化场效应晶体管的性能参数以产生用于场效应晶体管的快速设计。

3. 发明授权

US07689946B2 High-performance FET device layout 失效
标题翻译：高性能FET器件布局
公开(公告)号：US07689946B2
公开(公告)日：2010-03-30
申请号：US11550818
申请日：2006-10-19
申请人： Jonghae Kim , Sungjae Lee , Jean-Oliver Plouchart , Scott Keith Springer
发明人： Jonghae Kim , Sungjae Lee , Jean-Oliver Plouchart , Scott Keith Springer
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F17/5036
摘要： A fast FET and a method and system for designing the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.
摘要翻译：一种快速FET，以及用于设计快速FET的方法和系统。该方法包括：选择场效应晶体管的参考设计，场效应晶体管包括源极，漏极，源极和漏极之间的沟道，沟道上的栅电极，至少一个源极和源极所述至少一个源极接触件与所述栅电极隔开第一距离，所述至少一个漏极接触件与所述栅电极间隔开第二距离; 并且调整第一距离和第二距离以最大化场效应晶体管的性能参数以产生用于场效应晶体管的快速设计。

4. 发明申请

US20080109770A1 HIGH-PERFORMANCE FET DEVICE LAYOUT 失效
标题翻译：高性能FET器件布局
公开(公告)号：US20080109770A1
公开(公告)日：2008-05-08
申请号：US11550818
申请日：2006-10-19
申请人： Jonghae Kim , Sungjae Lee , Jean-Oliver Plouchart , Scott Keith Springer
发明人： Jonghae Kim , Sungjae Lee , Jean-Oliver Plouchart , Scott Keith Springer
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F17/5036
摘要： A fast FET and a method and system for designing the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.
摘要翻译：一种快速FET，以及用于设计快速FET的方法和系统。该方法包括：选择场效应晶体管的参考设计，场效应晶体管包括源极，漏极，源极和漏极之间的沟道，沟道上的栅电极，至少一个源极和源极所述至少一个源极接触件与所述栅电极隔开第一距离，所述至少一个漏极接触件与所述栅电极间隔开第二距离; 并且调整第一距离和第二距离以最大化场效应晶体管的性能参数以产生用于场效应晶体管的快速设计。

5. 发明申请

US20090057742A1 CMOS VARACTOR 审中-公开
公开(公告)号：US20090057742A1
公开(公告)日：2009-03-05
申请号：US11847378
申请日：2007-08-30
申请人： Sungjae Lee , Scott keith Springer
发明人： Sungjae Lee , Scott keith Springer
IPC分类号： H01L29/94 , H01L21/8238
CPC分类号： H01L29/93 , H01L27/0808 , H01L27/0811 , H01L29/94
摘要： A varactor and method of fabricating the varactor. The varactor includes a silicon body in a silicon layer of an SOI substrate; a polysilicon electrode comprising a gate region and a plate region separated from the body by a gate dielectric layer, the gate and plate regions contiguous, the electrode electrically connected to a first pad; and a source formed in the body on a first side of the gate region, a drain formed in the body on a second and opposite side of the gate region, and a body contact formed in the body on a side of the plate region away from the gate region, the source, drain and body contact, separated from each other by regions of the body under the electrode, the source, drain and body contact electrically connected to each other and to a second pad.
摘要翻译：变容二极管和制造变容二极管的方法。变容二极管包括SOI衬底的硅层中的硅体; 多晶硅电极，其包括栅极区域和通过栅极介电层与所述主体分离的板状区域，所述栅极和所述板区域邻接，所述电极电连接到第一焊盘; 以及形成在所述主体中的所述栅极区域的第一侧上的源极，在所述栅极区域的第二相对侧上形成在所述主体中的漏极，以及在所述主体中形成在所述板区域的远离所述栅极区域的一侧的主体接触栅极区域，源极，漏极和本体接触，通过电极下方的主体区域彼此分离，源极，漏极和主体接触彼此电连接并连接到第二焊盘。

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