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    • 3. 发明授权
    • Method of manufacturing a semiconductor device
    • 制造半导体器件的方法
    • US08563383B2
    • 2013-10-22
    • US13252621
    • 2011-10-04
    • Sang-Jin KimJong-Chan ShinYong-Kug BaeMyeong-Cheol KimDo-Hyoung Kim
    • Sang-Jin KimJong-Chan ShinYong-Kug BaeMyeong-Cheol KimDo-Hyoung Kim
    • H01L21/336
    • H01L21/823425H01L21/823437H01L29/66545H01L29/66628H01L29/7834
    • A method of manufacturing a semiconductor device includes forming a plurality of gate structures including a metal on a substrate having an isolation layer, forming first insulating interlayer patterns covering sidewalls of the gate structures, forming first capping layer patterns and a second capping layer pattern on the gate structures and the first insulating interlayer patterns, the first capping layer patterns covering upper faces of the gate structures, and the second capping layer pattern overlapping the isolation layer, partially removing the first insulating interlayer patterns using the first and the second capping layer patterns as etching masks to form first openings that expose portions of the substrate, forming metal silicide patterns on the portions of the substrate exposed in the forming of the first openings, and forming conductive structures on the metal silicide patterns.
    • 制造半导体器件的方法包括在具有隔离层的衬底上形成包括金属的多个栅极结构,形成覆盖栅极结构的侧壁的第一绝缘层间图案,形成第一覆盖层图案和第二覆盖层图案 栅极结构和第一绝缘层间图案,第一覆盖层图案覆盖栅极结构的上表面,第二覆盖层图案与隔离层重叠,使用第一和第二覆盖层图案部分地去除第一绝缘层间图案,如 蚀刻掩模以形成暴露基板部分的第一开口,在形成第一开口的裸露部分上形成金属硅化物图案,并在金属硅化物图案上形成导电结构。