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1. 发明申请

US20150035065A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20150035065A1
公开(公告)日：2015-02-05
申请号：US14295333
申请日：2014-06-04
申请人： Jong-Kook PARK , HONGSOO KIM , Won-Chul JANG
发明人： Jong-Kook PARK , HONGSOO KIM , Won-Chul JANG
IPC分类号： H01L23/50 , H01L27/06
CPC分类号： H01L27/105 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a substrate with an active region defined by a device isolation layer. A word line extends over the active region in a first direction, and a plurality of interconnections extends over the word line in a second direction perpendicular to the first direction. A contact pad is disposed between and spaced apart from the word line and the plurality of interconnections, extending in the first direction to overlap the plurality of interconnections and the active region when viewed from a plan view. A lower contact plug electrically connects the contact pad to the active region. An upper contact plug electrically connects the contact pad to one of the plurality of interconnections.
摘要翻译：半导体器件包括具有由器件隔离层限定的有源区的衬底。字线在第一方向上在有源区域上延伸，并且多个互连在垂直于第一方向的第二方向上在字线上延伸。接触垫设置在字线和多个互连之间并与之隔开的多个互连，当从平面图观察时，沿第一方向延伸以与多个互连和有源区重叠。下接触插头将接触垫电连接到有源区域。上接触插头将接触垫电连接到多个互连中的一个。

2. 发明申请

US20120094462A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
公开(公告)号：US20120094462A1
公开(公告)日：2012-04-19
申请号：US13330254
申请日：2011-12-19
申请人： Jong-Bum PARK , Han-Sang SONG , Jong-Kook PARK
发明人： Jong-Bum PARK , Han-Sang SONG , Jong-Kook PARK
IPC分类号： H01L21/02 , H01L21/28
CPC分类号： H01L27/10855 , H01L21/7687 , H01L28/90
摘要： A semiconductor device, includes: a first storage node contact plug penetrating a first interlayer insulation layer and partially protruding above the first interlayer insulation layer; a second storage node contact plug contacting the first storage node contact plug that protrudes above the first interlayer insulation layer; a storage node contacting a top surface of the second storage node contact plug; and a second interlayer insulation layer formed over the first interlayer insulation layer, wherein the second interlayer insulation layer surrounds an outer sidewall at a bottom region of the first storage node, and the second storage node contact plug, and wherein the first storage node contact plug protruding above the first interlayer insulation layer and the second storage node contact plug.

3. 发明申请

US20120007219A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120007219A1
公开(公告)日：2012-01-12
申请号：US13240983
申请日：2011-09-22
申请人： Jong-Bum PARK , Han-Sang SONG , Jong-Kook PARK
发明人： Jong-Bum PARK , Han-Sang SONG , Jong-Kook PARK
IPC分类号： H01L29/41
CPC分类号： H01L27/10855 , H01L21/7687 , H01L28/90
摘要： A semiconductor device, includes: a first storage node contact plug penetrating a first interlayer insulation layer and partially protruding above the first interlayer insulation layer; a second storage node contact plug contacting the first storage node contact plug that protrudes above the first interlayer insulation layer; a storage node contacting a top surface of the second storage node contact plug; and a second interlayer insulation layer formed over the first interlayer insulation layer, wherein the second interlayer insulation layer surrounds an outer sidewall at a bottom region of the first storage node, and the second storage node contact plug, and wherein the first storage node contact plug protruding above the first interlayer insulation layer and the second storage node contact plug.
摘要翻译：一种半导体器件，包括：穿过第一层间绝缘层并部分地突出在第一层间绝缘层上方的第一存储节点接触插塞; 与所述第一存储节点接触插头接触的第二存储节点接触插塞，所述第一存储节点接触插头突出在所述第一层间绝缘层之上; 接触所述第二存储节点接触插塞的顶表面的存储节点; 以及形成在所述第一层间绝缘层上的第二层间绝缘层，其中所述第二层间绝缘层围绕所述第一存储节点的底部区域处的外侧壁和所述第二存储节点接触插塞，并且其中所述第一存储节点接触插塞突出在第一层间绝缘层和第二存储节点接触插塞上方。

4. 发明申请

US20090291542A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20090291542A1
公开(公告)日：2009-11-26
申请号：US12344154
申请日：2008-12-24
申请人： Han-Sang SONG , Jong-Bum PARK , Jong-Kook PARK
发明人： Han-Sang SONG , Jong-Bum PARK , Jong-Kook PARK
IPC分类号： H01L21/308 , H01L21/02
CPC分类号： H01L21/76804 , H01L27/10852 , H01L28/90
摘要： A method for fabricating a semiconductor device includes: forming an etch stop pattern over a conductive layer, the etch stop pattern having a first opening exposing a top surface of the conductive layer; forming an insulation layer over the etch stop pattern; selectively etching the insulation layer to form a second opening exposing the top surface of the conductive layer; and enlarging the second opening until the etch stop pattern is exposed.
摘要翻译：一种用于制造半导体器件的方法包括：在导电层上形成蚀刻停止图案，所述蚀刻停止图案具有暴露所述导电层顶表面的第一开口; 在所述蚀刻停止图案上形成绝缘层; 选择性地蚀刻绝缘层以形成暴露导电层的顶表面的第二开口; 并扩大第二个开口，直到蚀刻停止图案被曝光。

5. 发明申请

US20130299942A1 CAPACITOR AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：电容器及其制造方法
公开(公告)号：US20130299942A1
公开(公告)日：2013-11-14
申请号：US13596007
申请日：2012-08-27
申请人： Jong-Kook PARK , Yong-Tae Cho
发明人： Jong-Kook PARK , Yong-Tae Cho
IPC分类号： H01L21/02 , H01L29/92
CPC分类号： H01L28/91 , H01L23/5223 , H01L27/10805 , H01L27/10808 , H01L27/10847 , H01L27/1085 , H01L28/60 , H01L28/87 , H01L29/66181 , H01L29/94 , H01L29/945 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a capacitor includes forming a mold structure over a substrate, wherein the mold structure has a plurality of open parts and has a mold layer stacked with a support layer; forming cylinder type lower electrodes in the open parts; forming a first upper electrode over an entire surface of a structure including the cylinder type lower electrodes to fill the cylinder type lower electrodes; defining a through hole that passes through portions of the first upper electrode and the support layer; removing the mold layer through the through hole and exposing the cylinder type lower electrodes; forming a second upper electrode to fill the through hole and spaces between the cylinder type lower electrodes; and forming a third upper electrode to connect the second upper electrode and the first upper electrode with each other.
摘要翻译：一种电容器的制造方法，其特征在于，在基板上形成模具结构体，其中，所述模具结构体具有多个开口部，并且具有层叠有支承层的模层; 在开口部分形成圆筒型下电极; 在包括所述圆筒型下电极的结构的整个表面上形成第一上电极以填充所述圆筒型下电极; 限定穿过所述第一上电极和所述支撑层的部分的通孔; 通过通孔去除模具层并暴露圆柱形下电极; 形成第二上部电极以填充所述圆筒形下部电极之间的通孔和间隔; 以及形成第三上电极，以将第二上电极和第一上电极彼此连接。

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