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1. 发明申请

US20090309889A1 Method and Apparatus for Contolling Writing of Data to Graphic Memory 有权
标题翻译：用于将数据写入图形存储器的方法和装置
公开(公告)号：US20090309889A1
公开(公告)日：2009-12-17
申请号：US12476905
申请日：2009-06-02
申请人： Jong Kon Bae , Sang-Hoon Lim , Kyu Young Chung , Won Sik Kang , Dong Hyuk Shin , Kyung Lip Park
发明人： Jong Kon Bae , Sang-Hoon Lim , Kyu Young Chung , Won Sik Kang , Dong Hyuk Shin , Kyung Lip Park
IPC分类号： G09G5/39
CPC分类号： G06T1/60 , G09G5/363 , G09G5/393 , G09G5/399 , G09G2360/12 , G09G2360/123
摘要： A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.
摘要翻译：提供了一种用于控制将数据写入图形存储器的方法和装置。在该方法和装置中，多个连续输入的数据被控制为在时间或空间方面不连续地写入相同的存储区域。

2. 发明授权

US08466923B2 Method and apparatus for contolling writing of data to graphic memory 有权
标题翻译：用于将数据写入图形存储器的方法和装置
公开(公告)号：US08466923B2
公开(公告)日：2013-06-18
申请号：US12476905
申请日：2009-06-02
申请人： Jong-Kon Bae , Sang-Hoon Lim , Kyu Young Chung , Won Sik Kang , Dong Hyuk Shin , Kyung Lip Park
发明人： Jong-Kon Bae , Sang-Hoon Lim , Kyu Young Chung , Won Sik Kang , Dong Hyuk Shin , Kyung Lip Park
IPC分类号： G09G5/39
CPC分类号： G06T1/60 , G09G5/363 , G09G5/393 , G09G5/399 , G09G2360/12 , G09G2360/123
摘要： A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.
摘要翻译：提供了一种用于控制将数据写入图形存储器的方法和装置。在该方法和装置中，多个连续输入的数据被控制为在时间或空间方面不连续地写入相同的存储区域。

3. 发明申请

US20070139403A1 Visual Display Driver and Method of Operating Same 审中-公开
标题翻译：视觉显示驱动程序和操作方法相同
公开(公告)号：US20070139403A1
公开(公告)日：2007-06-21
申请号：US11555813
申请日：2006-11-02
申请人： Kyu Young Chung
发明人： Kyu Young Chung
IPC分类号： G09G5/00
CPC分类号： G09G3/2007 , G09G2310/0275 , G09G2310/0297 , G09G2360/18
摘要： A visual display driver (e.g., LCD display driver) includes a memory array and a multiplexer unit therein. The memory array includes a plurality of rows and columns of memory cells and the multiplexer unit includes a plurality of N-to-1 multiplexers. These multiplexers are configured to route display data from N×M columns in the memory array to an M-bit wide display data bus, in response to a multiplexer control signal. An M-bit latch unit and a channel source driver are also provided. The latch unit is electrically coupled to an output of the multiplexer unit and the channel source driver is electrically coupled to an output of the M-bit latch unit. The driver also includes an address converter. This address converter is configured to convert multiple distinct line addresses applied thereto into a corresponding plurality of distinct memory addresses that map to a single row within the memory array.
摘要翻译：视觉显示驱动器（例如，LCD显示驱动器）在其中包括存储器阵列和多路复用器单元。存储器阵列包括多个存储单元的行和列，并且多路复用器单元包括多个N到1复用器。这些多路复用器被配置为响应于多路复用器控制信号将显示数据从存储器阵列中的N×M列路由到M位宽显示数据总线。还提供M位锁存单元和通道源驱动器。闩锁单元电耦合到多路复用器单元的输出，并且信道源驱动器电耦合到M位锁存单元的输出。驱动程序还包括一个地址转换器。该地址转换器被配置为将施加到其上的多个不同的行地址转换成映射到存储器阵列内的单个行的对应的多个不同的存储器地址。

4. 发明申请

US20100039179A1 Folded cascode operational amplifier having improved phase margin 失效
标题翻译：具有改进的相位裕度的折叠共源共栅运算放大器
公开(公告)号：US20100039179A1
公开(公告)日：2010-02-18
申请号：US12461531
申请日：2009-08-14
申请人： Kyu Young Chung
发明人： Kyu Young Chung
IPC分类号： H03F3/45
CPC分类号： H03F3/45219 , H03F2200/03 , H03F2203/45512 , H03F2203/45631 , H03F2203/45646 , H03F2203/45648
摘要： A folded cascode operational amplifier having an improved phase margin due to pole-zero cancellation by using a plurality of cascode-connected bias circuits and frequency compensation capacitors.
摘要翻译：一种折叠共源共栅运算放大器，其通过使用多个共源共栅连接的偏置电路和频率补偿电容器，由于极零点消除而具有改善的相位裕度。

5. 发明授权

US07907011B2 Folded cascode operational amplifier having improved phase margin 失效
标题翻译：具有改进的相位裕度的折叠共源共栅运算放大器
公开(公告)号：US07907011B2
公开(公告)日：2011-03-15
申请号：US12461531
申请日：2009-08-14
申请人： Kyu Young Chung
发明人： Kyu Young Chung
IPC分类号： H03F3/45
CPC分类号： H03F3/45219 , H03F2200/03 , H03F2203/45512 , H03F2203/45631 , H03F2203/45646 , H03F2203/45648
摘要： A folded cascode operational amplifier having an improved phase margin due to pole-zero cancellation by using a plurality of cascode-connected bias circuits and frequency compensation capacitors.
摘要翻译：一种折叠共源共栅运算放大器，其通过使用多个共源共栅连接的偏置电路和频率补偿电容器，由于极零消除而具有改善的相位裕度。

6. 发明授权

US07907108B2 Source driver circuits and methods providing reduced power consumption for driving flat panel displays 有权
标题翻译：源驱动器电路和方法，可降低驱动平板显示器的功耗
公开(公告)号：US07907108B2
公开(公告)日：2011-03-15
申请号：US10880118
申请日：2004-06-29
申请人： Kyu Young Chung
发明人： Kyu Young Chung
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3655 , G09G3/3696
摘要： Circuits and methods are provided for driving flat panel displays (e.g., a liquid crystal display (LCD)), which provide reduced power consumption for driving data lines of flat panels displays. Source driving circuits and methods for driving data lines use both intermediate reference voltages and boosted driving voltages in each driving cycle (as opposed to entirely using boosted driving voltages) to reduce power consumption and provide charge recycling.
摘要翻译：提供了用于驱动平板显示器（例如，液晶显示器（LCD））的电路和方法，其提供用于驱动平板显示器的数据线的降低的功耗。用于驱动数据线的源驱动电路和方法在每个驱动周期中使用中间参考电压和升压驱动电压（与完全使用升压驱动电压相反）来降低功耗并提供电荷回收。

7. 发明授权

US07471286B2 Circuits and methods for driving flat panel displays 失效
标题翻译：用于驱动平板显示器的电路和方法
公开(公告)号：US07471286B2
公开(公告)日：2008-12-30
申请号：US10704075
申请日：2003-11-07
申请人： Kyu Young Chung
发明人： Kyu Young Chung
IPC分类号： G06F3/038 , G09G5/00
CPC分类号： G09G3/3677 , G09G2310/0286 , G09G2310/0289
摘要： Circuits and methods for driving gates lines of a flat panel display, wherein gate driver circuit architectures provide compact designs that enable smaller chip sizes for gate driver ICs. In one aspect, a semiconductor integrated gate driver IC comprises a plurality of gate driver circuits, wherein each gate driver circuit drives a corresponding gate line of a display, and a level shifter circuit, for generating a precharge control signal for the gate driver circuits. Each gate driver circuit comprises a line decoder for decoding a gate line control signal and generating a decoded gate line control signal and a precharge circuit for precharging a gate driver turn-on voltage in response to the precharge control signal before activating the gate line. During a driving phase, the precharged gate driver turn-on voltage is discharged when the gate line is activated in response to the decoded gate line control signal, whereas the precharged gate driver turn-on voltage is maintained when the gate line is not activated in response to the decoded gate line control signal.
摘要翻译：用于驱动平板显示器的栅极线的电路和方法，其中栅极驱动器电路架构提供了使栅极驱动器IC更小的芯片尺寸的紧凑设计。一方面，半导体集成栅极驱动器IC包括多个栅极驱动器电路，其中每个栅极驱动器电路驱动显示器的相应栅极线，以及电平移位器电路，用于为栅极驱动器电路产生预充电控制信号。每个栅极驱动器电路包括用于对栅极线控制信号进行解码并产生解码栅极线控制信号的线路解码器和用于在激活栅极线之前响应于预充电控制信号对栅极驱动器导通电压进行预充电的预充电电路。在驱动阶段期间，当栅极线响应于解码的栅极线控制信号被激活时，预充电栅极驱动器接通电压被放电，而当栅极线未被激活时，保持预充电栅极驱动器接通电压响应于解码的栅极线控制信号。

8. 发明授权

US07403072B2 Integrated circuit devices having a control circuit for biasing an amplifier output stage and methods of operating the same 有权
标题翻译：具有用于偏置放大器输出级的控制电路的集成电路器件及其操作方法
公开(公告)号：US07403072B2
公开(公告)日：2008-07-22
申请号：US11271058
申请日：2005-11-10
申请人： Jae Hyuck Woo , Kyu Young Chung
发明人： Jae Hyuck Woo , Kyu Young Chung
IPC分类号： H03F3/26
CPC分类号： H03F3/45475 , H03F1/0261 , H03F1/0277 , H03F3/211 , H03F3/3022 , H03F3/42 , H03F3/72 , H03F2203/30021 , H03F2203/7206
摘要： An integrated circuit device includes an amplifier circuit that generates an output voltage. A bias control circuit is configured to generate a bias control voltage or the output voltage at an output thereof based on a state of a control signal. An output stage driver circuit that is responsive to the voltage generated at the output of the bias control circuit.
摘要翻译：集成电路器件包括产生输出电压的放大器电路。偏置控制电路被配置为基于控制信号的状态产生偏置控制电压或其输出处的输出电压。输出级驱动电路，其响应于在偏置控制电路的输出处产生的电压。

9. 发明授权

US07023266B2 Device and method for nullifying offset voltages in operational amplifiers 有权
标题翻译：用于使运算放大器中的失调电压无效的装置和方法
公开(公告)号：US07023266B2
公开(公告)日：2006-04-04
申请号：US10853421
申请日：2004-05-25
申请人： Kyu Young Chung
发明人： Kyu Young Chung
IPC分类号： H03F1/02
CPC分类号： H03F3/45775 , H03F3/45977
摘要： A device and method for nullifying an offset voltage in an operational amplifier, the operational amplifier having a first input, a second input, an output, and a first resistor connected between the output and the first input, the device comprising: an adjustable resistor electrically connected to the first resistor, forming a first resistor network having a first feedback ratio at the first input of the operational amplifier; a comparator having a first input and a second input, the first input electrically connected to the output of the operational amplifier through a second resistor; a third resistor connected to the second resistor, forming a second resistor network having a second feedback ratio at the first input of the comparator; and an offset measurer electrically connected to the comparator and the adjustable resistor for measuring an output value of the comparator and for adjusting the adjustable resistor based on the measured output value.
摘要翻译：一种用于使运算放大器中的偏移电压无效的装置和方法，所述运算放大器具有连接在所述输出端和所述第一输入端之间的第一输入端，第二输入端，输出端和第一电阻器，所述器件包括：电可调电阻器连接到第一电阻器，形成在运算放大器的第一输入处具有第一反馈比的第一电阻器网络; 具有第一输入和第二输入的比较器，所述第一输入通过第二电阻电连接到所述运算放大器的输出; 连接到所述第二电阻器的第三电阻器，形成在比较器的第一输入处具有第二反馈比的第二电阻器网络; 以及偏置测量器，其电连接到所述比较器和所述可调电阻器，用于测量所述比较器的输出值并且用于基于所测量的输出值来调节所述可调电阻器。

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