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1. 发明申请

US20060075499A1 Virus scanner system and method with integrated spyware detection capabilities 有权
公开(公告)号：US20060075499A1
公开(公告)日：2006-04-06
申请号：US10952039
申请日：2004-09-27
申请人： Jonathan Edwards , Andrew Woodruff , Candace Worley , Ryan Allphin
发明人： Jonathan Edwards , Andrew Woodruff , Candace Worley , Ryan Allphin
IPC分类号： G06F12/14 , H04L9/32 , G06F11/00 , G06F11/30 , G06F11/22 , G06F11/32 , G06F11/34 , G06F11/36 , G06F12/16 , G06F15/18 , G08B23/00
CPC分类号： G06F21/57 , G06F21/56
摘要： A system, method and computer program product are provided for scanning for spyware utilizing a virus scanner. In use, at least one computer is scanned for viruses utilizing a virus scanner. Still yet, the computer is further scanned for spyware utilizing the virus scanner. Such computer is scanned for the spyware by scanning a registry associated therewith.

2. 发明申请

US20080010684A1 VIRUS SCANNER SYSTEM AND METHOD WITH INTEGRATED SPYWARE DETECTION CAPABILITIES 有权
标题翻译：病毒扫描仪系统及其集成的SPYWARE检测能力的方法
公开(公告)号：US20080010684A1
公开(公告)日：2008-01-10
申请号：US11855083
申请日：2007-09-13
申请人： Jonathan Edwards , Andrew Woodruff , Candace Worley , Ryan Allphin
发明人： Jonathan Edwards , Andrew Woodruff , Candace Worley , Ryan Allphin
IPC分类号： G08B23/00
CPC分类号： G06F21/57 , G06F21/56
摘要： A system, method and computer program product are provided for scanning for spyware utilizing a virus scanner. In use, at least one computer is scanned for viruses utilizing a virus scanner. Still yet, the computer is further scanned for spyware utilizing the virus scanner. Such computer is scanned for the spyware by scanning a registry associated therewith.
摘要翻译：提供了一种系统，方法和计算机程序产品，用于扫描使用病毒扫描程序的间谍软件。在使用中，使用病毒扫描程序扫描至少一台计算机进行病毒扫描。仍然，计算机被进一步扫描利用病毒扫描器的间谍软件。通过扫描与其相关联的注册表来扫描这样的计算机以进行间谍软件。

3. 发明授权

US5506437A Microcomputer with high density RAM in separate isolation well on single chip 失效
标题翻译：具有高密度RAM的微电脑单独隔离良好
公开(公告)号：US5506437A
公开(公告)日：1996-04-09
申请号：US66486
申请日：1993-05-24
申请人： Michael D. May , Jonathan Edwards , David L. Waller
发明人： Michael D. May , Jonathan Edwards , David L. Waller
IPC分类号： G06F9/318 , G06F9/46 , G06F9/48 , G06F15/78 , G06F15/80 , G11C29/00 , H01L27/04
CPC分类号： G06F9/4881 , G06F15/786 , G06F15/8023 , G06F9/30112 , G06F9/3016 , G06F9/30185 , G06F9/54 , G11C29/70 , Y10S257/903
摘要： A microcomputer comprises an integrated circuit device with processor and memory and communication links arranged to provide non-shared connections to similar links of other microcomputers. The communication links include message synchronization and permit creation of networks of microcomputers with rapid communication between concurrent processes on the same or different microcomputers.
摘要翻译：微型计算机包括具有处理器和存储器的集成电路装置，以及布置成向其他微型计算机的类似链路提供非共享连接的通信链路。通信链路包括消息同步和允许在相同或不同的微型计算机上的并发进程之间快速通信的微型计算机网络的创建。

4. 发明授权

US5452467A Microcomputer with high density ram in separate isolation well on single chip 失效
标题翻译：具有高密度柱塞的微电脑单独隔离良好
公开(公告)号：US5452467A
公开(公告)日：1995-09-19
申请号：US66462
申请日：1993-05-24
申请人： Michael D. May , Jonathan Edwards , David L. Waller
发明人： Michael D. May , Jonathan Edwards , David L. Waller
IPC分类号： G06F9/318 , G06F9/46 , G06F9/48 , G06F15/78 , G06F15/80 , G11C29/00 , G06F9/22
CPC分类号： G06F9/4881 , G06F15/786 , G06F15/8023 , G06F9/30112 , G06F9/3016 , G06F9/30185 , G06F9/54 , G11C29/70 , Y10S257/903
摘要： A microcomputer includes an on-chip processor with at least 1K bytes of high density RAM on-chip together with isolation regions to protect the RAM from noise from transistors on-chip operating independently of the RAM.
摘要翻译：一个微型计算机包括具有至少1K字节高密度RAM片上的片上处理器和隔离区域，以保护RAM免受独立于RAM的片上操作晶体管的噪声。

5. 发明授权

US4680698A High density ROM in separate isolation well on single with chip 失效
标题翻译：高密度ROM单独隔离，单芯片
公开(公告)号：US4680698A
公开(公告)日：1987-07-14
申请号：US552601
申请日：1983-11-16
申请人： Jonathan Edwards , David L. Waller , Michael D. May
发明人： Jonathan Edwards , David L. Waller , Michael D. May
IPC分类号： G06F9/30 , G06F9/318 , G06F9/34 , G06F9/355 , G06F9/46 , G06F9/48 , G06F9/52 , G06F15/78 , G06F15/80 , G11C29/00 , H01L21/761 , H01L21/822 , H01L27/04 , G06F13/00 , G06F7/48 , G06F15/16 , H01L27/02
CPC分类号： G06F9/4881 , G06F15/786 , G06F15/8023 , G06F9/30167 , G06F9/30192 , G06F9/54 , G11C29/70
摘要： A programmable, high speed, single chip microcomputer includes 4K of RAM, ROM, registers and an ALU. Program can be stored in the on-chip RAM. The first local variable of each process to be executed is a workspace pointer (WPTR), and each process has a respective workspace identified by its WPTR. For each process, addressing of other variables is relative to the current WPTR, which is stored in a workpiece pointer register (WPTR REG). Instructions are constant bit size, having a function portion and a data portion loaded, respectively, into an instruction buffer (IB) and an operand register (OREGTR). Memory address locations are formed by combining the contents of the workspace pointer register and the operand register, or the contents of the A Register and the operand register. A set of "direct functions" obtains data from OREG. "Indirect functions" use the OREG contents to identify other functions, obtaining data from registers other than the operand register. A "prefixing" function (PFIX) develops operands having long bit lengths. Scheduling and descheduling of processes are achieved by forming a linked list within the several workspaces for the active processes. Each workspace identifies the workspace pointer of the next process to be executed. Each workspace contains in memory the identification of the next instruction to be executed for that respective process. A "last pointer" register (LPTR REG.) cooperates in the scheduling operations. Each microcomputer chip can be coupled serially to other such chips on a respective pair of only two wires, each a unidirectional channel. Each channel also has two registers, one for process identification and one for data. Communications are synchronized.
摘要翻译：一个可编程的高速单片机包括4K的RAM，ROM，寄存器和ALU。程序可以存储在片内RAM中。要执行的每个进程的第一个局部变量是工作区指针（WPTR），每个进程都具有由其WPTR标识的相应工作空间。对于每个进程，其他变量的寻址是相对于存储在工件指针寄存器（WPTR REG）中的当前WPTR。指令是恒定位大小，具有分别加载到指令缓冲器（IB）和操作数寄存器（OREGTR）中的功能部分和数据部分。通过组合工作区指针寄存器和操作数寄存器的内容，或A寄存器和操作数寄存器的内容来形成存储器地址位置。一组“直接函数”从OREG获取数据。 “间接功能”使用OREG内容识别其他功能，从操作数寄存器以外的寄存器获取数据。 “前缀”功能（PFIX）开发具有长位长度的操作数。通过在活动过程的几个工作区内形成一个链表来实现进程的调度和调度。每个工作区标识要执行的下一个进程的工作区指针。每个工作区在内存中包含要为该进程执行的下一条指令的标识。 “最后指针”寄存器（LPTR REG。）在调度操作中协作。每个微型计算机芯片可以在相应的一对仅两条导线上串联连接到其它这样的芯片，每个线路都是单向通道。每个通道还有两个寄存器，一个用于进程标识，另一个用于数据。通信同步。

6. 发明申请

US20160179706A1 PAIRING OF EXTERNAL DEVICE WITH RANDOM USER ACTION 有权
标题翻译：用随机的用户行为配对外部设备
公开(公告)号：US20160179706A1
公开(公告)日：2016-06-23
申请号：US14579689
申请日：2014-12-22
申请人： Cedric Cochin , Jonathan Edwards , Aditya Kapoor
发明人： Cedric Cochin , Jonathan Edwards , Aditya Kapoor
IPC分类号： G06F13/12 , G06F9/44 , G06F13/38
CPC分类号： G06F13/126 , G06F9/4411 , G06F13/385 , G06F21/35 , G06F21/44 , G06F21/445 , G06F21/53 , G06F21/566 , G06F21/85 , H04W12/04 , H04W12/06
摘要： Certain embodiments herein relate to pairing an external device and a computer using a random user action. The random user action may be generated based on the type of device. After an external device is connected to the computer, the external device is segregated from one or more resources of the computer. A random user action based on the device type, and to be received from the external device, is generated and requested. If the random user action is received, the external device is paired with the computer and provided access to the one or more resources of the computer.
摘要翻译：本文中的某些实施例涉及使用随机用户动作来配对外部设备和计算机。可以基于设备的类型来生成随机用户动作。外部设备连接到计算机后，外部设备与计算机的一个或多个资源隔离。生成并请求基于设备类型并从外部设备接收的随机用户动作。如果接收到随机用户操作，则外部设备与计算机配对，并提供对计算机的一个或多个资源的访问。

7. 发明申请

US20140026216A1 SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR DETECTING UNWANTED DATA BASED ON SCANNING ASSOCIATED WITH A PAYLOAD EXECUTION AND A BEHAVIORAL ANALYSIS 有权
标题翻译：系统，方法和计算机程序产品，用于根据与PAYLOAD执行相关的扫描和行为分析检测无数据
公开(公告)号：US20140026216A1
公开(公告)日：2014-01-23
申请号：US13943709
申请日：2013-07-16
申请人： Gregory Dalcher , Jonathan Edwards
发明人： Gregory Dalcher , Jonathan Edwards
IPC分类号： G06F21/56
CPC分类号： G06F21/56 , G06F21/564 , G06F21/566 , H04L63/1416
摘要： A system, method, and computer program product are provided for detecting unwanted data based on scanning associated with a payload execution and a behavioral analysis. In use, an execution of a payload is detected, utilizing interface monitoring. Additionally, process memory associated with the execution of the payload is scanned. Further, a behavioral analysis is performed. Still yet, unwanted data is detected based on the scanning and the performance of the behavioral analysis.
摘要翻译：提供了一种系统，方法和计算机程序产品，用于基于与有效载荷执行和行为分析相关联的扫描来检测不需要的数据。在使用中，利用接口监视来检测有效载荷的执行。此外，扫描与执行有效负载相关联的进程存储器。此外，执行行为分析。仍然，根据行为分析的扫描和性能来检测不需要的数据。

8. 发明申请

US20060168660A1 Method and system for delayed write scanning for detecting computer malwares 有权
标题翻译：用于检测计算机恶意软件的延迟写入扫描方法和系统
公开(公告)号：US20060168660A1
公开(公告)日：2006-07-27
申请号：US11390388
申请日：2006-03-28
申请人： Jonathan Edwards , Shawna Turner
发明人： Jonathan Edwards , Shawna Turner
IPC分类号： G06F12/14
CPC分类号： G06F21/562 , G06F21/568
摘要： A method, system, and computer program product provides on-access anti-virus scanning of data files, which can be performed without introducing significant performance degradation and provides delayed file write operation scanning upon interception of a file write operation. A method of detecting a malware comprises the steps of intercepting a file access operation of the a process to a file, in response to the intercepting, waiting a time interval between the intercepting and scanning the file for a malware, and scanning the file for the malware, after waiting the time interval, wherein the process is associated with an application program and wherein the file access operation is a file write operation.
摘要翻译：一种方法，系统和计算机程序产品提供数据文件的按访问反病毒扫描，可以在不引入显着的性能下降的情况下执行扫描，并在截取文件写入操作时提供延迟的文件写入操作扫描。一种检测恶意软件的方法包括以下步骤：响应于拦截，等待对于恶意软件的截取和扫描文件之间的时间间隔，以及扫描该文件的文件，对文件进行文件访问操作在等待所述时间间隔之后，所述过程与应用程序相关联，并且其中所述文件访问操作是文件写入操作。

9. 发明授权

US5689668A Dynamic hierarchical selection menu 失效
标题翻译：动态层次选择菜单
公开(公告)号：US5689668A
公开(公告)日：1997-11-18
申请号：US717949
申请日：1996-09-23
申请人： Phillip Beaudet , Matthew Black , Jonathan Edwards , Julian Jones , Eduardus Antonius Theodorus Merks , Roger Spall
发明人： Phillip Beaudet , Matthew Black , Jonathan Edwards , Julian Jones , Eduardus Antonius Theodorus Merks , Roger Spall
IPC分类号： G06F3/14 , G06F3/0482
CPC分类号： G06F3/0482 , Y10S715/975
摘要： A control window for navigating and implementing menu selections in a multiple level hierarchical menu is provided having a first zone displaying a list of the selection levels and a second zone displaying a list of the selection options within a selection level. The second zone is refreshed with selections for another selection level in the menu hierarchy in response to a user implementation or registration of a selection option at the originally displayed selection level. Preset default settings in all selection levels permit the user to implement a "fast path" hierarchical menu selection.
摘要翻译：提供了用于在多级分级菜单中导航和实现菜单选择的控制窗口，其具有显示选择级别的列表的第一区域和显示选择级别内的选择选项的列表的第二区域。响应于在最初显示的选择级别的用户实现或注册选择选项，菜单层级中的另一选择级别的选择被刷新第二区域。在所有选择级别中预设默认设置允许用户实现“快速路径”分层菜单选择。

10. 发明授权

US4910576A Memory cell 失效
标题翻译：存储单元
公开(公告)号：US4910576A
公开(公告)日：1990-03-20
申请号：US142835
申请日：1988-01-06
申请人： Richard N. Campbell , Jonathan Edwards , Michael K. Thompson
发明人： Richard N. Campbell , Jonathan Edwards , Michael K. Thompson
IPC分类号： H01L27/088 , G11C11/412 , H01L21/8234 , H01L21/8244 , H01L27/11
CPC分类号： H01L27/1112 , G11C11/412
摘要： In a semi-conductor memory cell components are formed in regions separated from each other by one or more insulation layers (40) and first and second load resistors (20,22) and gate regions (70,72) of first and second cross-coupled driver field effect transistors (16,18) are formed in a first conductive layer (64) and the word line (36) and gate regions (66,68) of first and second transfer transistors (28,30) are formed in a second conductive layer (60).

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