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1. 发明授权

US07533377B2 Achieving autonomic behavior in an operating system via a hot-swapping mechanism 失效
标题翻译：通过热插拔机制实现操作系统中的自主行为
公开(公告)号：US07533377B2
公开(公告)日：2009-05-12
申请号：US10673587
申请日：2003-09-29
申请人： Jonathan Appavoo , Marc Alan Auslander , Kevin Kin-Fai Hui , Orran Yaakov Krieger , Dilma Menezes Da Silva , Robert William Wisniewski
发明人： Jonathan Appavoo , Marc Alan Auslander , Kevin Kin-Fai Hui , Orran Yaakov Krieger , Dilma Menezes Da Silva , Robert William Wisniewski
IPC分类号： G06F9/44 , G06F15/177
CPC分类号： G06F8/656
摘要： Systems, especially operating systems, are becoming more complex to the point where maintaining them by humans is becoming nearly impossible. Many corporations have recognized this trend and have begun investing in autonomic technology. Autonomic technology allows a piece of software to monitor, diagnose, and repair itself. This can be used for improved performance, reliability, maintainability, security, etc. Disclosed herein is a mechanism to allow operating systems to hot swap a piece of operating system code, while continuing to offer to the user the service which that code is providing. This can be used, for examples, to increase the performance of an application or to fix a detected security hole live without bringing the machine down. Some autonomic ability will be mandatory in next generation operating system for without it they will collapse under their own complexity. The invention offers a key component of being able to achieve autonomic computing.
摘要翻译：系统尤其是操作系统正在变得越来越复杂，人们几乎不可能维系这些系统。许多公司已经认识到这一趋势，并开始投资于自主技术。自动技术允许一个软件来监视，诊断和修复自身。这可以用于改进的性能，可靠性，可维护性，安全性等。这里公开了一种允许操作系统热插拔操作系统代码的机制，同时继续向用户提供该代码提供的服务。例如，这可以用于增加应用程序的性能或者在不使机器停机的情况下固定检测到的安全漏洞。一些自主能力在下一代操作系统中将是强制性的，没有它们将在自己的复杂性下崩溃。本发明提供能够实现自主计算的关键组件。

2. 发明授权

US06601146B2 Technique for efficiently transferring moderate amounts of data across address space boundary 失效
标题翻译：用于跨地址空间边界高效传输适量数据的技术
公开(公告)号：US06601146B2
公开(公告)日：2003-07-29
申请号：US09098061
申请日：1998-06-16
申请人： Marc Alan Auslander , David Joel Edelsohn , Hubertus Franke , Orran Yaakov Krieger , Bryan Savoye Rosenburg , Robert William Wisniewski
发明人： Marc Alan Auslander , David Joel Edelsohn , Hubertus Franke , Orran Yaakov Krieger , Bryan Savoye Rosenburg , Robert William Wisniewski
IPC分类号： G06F1200
CPC分类号： H04L29/06 , G06F9/544
摘要： A method and apparatus for performing efficient interprocess communication (IPC) in a computer system. With this invention, a memory region called the IPC transfer region is shared among all processes of the system to enable more efficient IPC. The unique physical address of the region is mapped into a virtual address from each of the address spaces of the processes of the system. When one of the processes needs to transfer data to another of the processes, the first process stores arguments describing the data in the region using the virtual address in its address space that maps into the unique physical address. When the other or second process needs to receive the data, the second process reads the data from the second region using the virtual address in its memory space that maps into the unique physical address. With this invention, in most cases, control of the IPC transfer region occurs automatically without any kernel intervention.
摘要翻译：一种用于在计算机系统中执行有效的进程间通信（IPC）的方法和装置。利用本发明，在系统的所有进程之间共享称为IPC传送区域的存储区域，以实现更高效的IPC。区域的唯一物理地址被映射到系统进程的每个地址空间的虚拟地址。当其中一个进程需要将数据传输到另一个进程时，第一个进程使用映射到唯一物理地址的地址空间中的虚拟地址来存储描述该区域中的数据的参数。当另一个或第二个进程需要接收数据时，第二个进程使用映射到唯一物理地址的存储空间中的虚拟地址从第二个区域读取数据。利用本发明，在大多数情况下，IPC传送区域的控制自动发生，无需任何内核干预。

3. 发明授权

US06587865B1 Locally made, globally coordinated resource allocation decisions based on information provided by the second-price auction model 失效
标题翻译：基于第二价格拍卖模式提供的信息进行全球协调的资源分配决策
公开(公告)号：US06587865B1
公开(公告)日：2003-07-01
申请号：US09157479
申请日：1998-09-21
申请人： Tracy Jay Kimbrel , Marc Alan Auslander , David Joel Edelsohn , Hubertus Franke , Orran Yaakov Krieger , Bryan Savoye Rosenburg , Robert William Wisniewski
发明人： Tracy Jay Kimbrel , Marc Alan Auslander , David Joel Edelsohn , Hubertus Franke , Orran Yaakov Krieger , Bryan Savoye Rosenburg , Robert William Wisniewski
IPC分类号： G06F900
CPC分类号： G06F9/4881 , G06F9/50
摘要： In a computer system, a method and apparatus for scheduling activities' access to a resource with minimal involvement of the kernel of the operating system. More specifically, a “next bid” is maintained, and this parameter identifies the highest bid for the resource by any activity not currently accessing the resource. The accessing activity then compares its bid, which can be time varying, with the “next bid” to determine whether it should release the resource to another activity. The “next bid” can be accessed without any system calls to the operating system. This allows the activity to determine whether to relinquish control to the system without the necessity of communication between the two. Likewise, the operating system can access the bid of the accessing activity without explicit communication. This allows the system to determine whether to preempt the accessing activity without the necessity of communication between the two.
摘要翻译：在计算机系统中，一种方法和装置，用于以最少的操作系统的内核参与调度活动对资源的访问。更具体地说，维持“下一个出价”，并且该参数通过当前未访问资源的任何活动来识别该资源的最高出价。然后，访问活动将其可以随时间变化的出价与“下一个出价”进行比较，以确定是否将资源释放到另一个活动。无需对操作系统进行任何系统调用即可访问“下一个出价”。这允许活动确定是否放弃对系统的控制，而不需要两者之间的通信。同样，操作系统可以访问访问活动的出价而不进行明确的通信。这允许系统确定是否抢占访问活动，而不需要两者之间的通信。

4. 发明授权

US5835928A Circuitry and method for relating first and second memory locations where the second memory location stores information from the first memory location 失效
标题翻译：用于关联第一和第二存储器位置的电路和方法，其中第二存储器位置存储来自第一存储器位置的信息
公开(公告)号：US5835928A
公开(公告)日：1998-11-10
申请号：US658913
申请日：1996-05-31
申请人： Marc Alan Auslander , Albert Chang , Robert Morris Meade
发明人： Marc Alan Auslander , Albert Chang , Robert Morris Meade
IPC分类号： G06F12/08 , G06F12/00 , G06F13/00
CPC分类号： G06F12/0864
摘要： A first group of memory locations stores information. The first group is arranged into multiple congruence classes of memory locations. The congruence classes include a first congruence class having more than one memory location. A second group of memory locations stores information from the first group of memory locations. Directory locations store information relating the first and second groups of memory locations. The directory locations include a first directory location able to store information relating a particular one of the second group of memory locations to any memory location of more than one of the congruence classes including the first congruence class.
摘要翻译：第一组内存位置存储信息。第一组被安排成多个同余类的记忆位置。同余类包括具有多个内存位置的第一个同余类。第二组存储器位置存储来自第一组存储器位置的信息。目录位置存储与第一组和第二组存储单元有关的信息。目录位置包括第一目录位置，其能够将关于第二组存储器位置中的特定一个的信息存储到包括第一同余类的一致性类中的多于一个的任何存储器位置。

5. 发明授权

US06523097B1 Unvalue-tagged memory without additional bits 失效
标题翻译：无额定位的无价值标记的内存
公开(公告)号：US06523097B1
公开(公告)日：2003-02-18
申请号：US09613697
申请日：2000-07-11
申请人： Jochen Liedtke , Marc Alan Auslander
发明人： Jochen Liedtke , Marc Alan Auslander
IPC分类号： G06F1200
CPC分类号： G06F9/3865 , G06F7/483 , G06F7/49905 , G06F9/3842 , G06F12/145
摘要： There is provided a method for representing unvalues in an unvalue-unaware memory of a computer processing system. The method includes the step of selecting arbitrary bit combinations to represent the unvalues, upon startup of the system. Upon performing a read operation from the memory, a read value is interpreted as an unvalue, when the read value matches at least one of the bit combinations. Upon performing a write operation to the memory, a value-unvalue-collision exception is raised, when a valid value is written to the memory and the valid value matches at least one of the bit combinations.
摘要翻译：提供了一种在计算机处理系统的无价值存储器中表示无价值的方法。该方法包括在系统启动时选择任意比特组合来表示无价值的步骤。在从存储器执行读取操作时，当读取值与至少一个位组合匹配时，读取值被解释为无价值。在对存储器执行写入操作时，当将有效值写入存储器并且有效值与至少一个位组合匹配时，引起值 - 非值碰撞异常。

6. 发明授权

US06341345B1 Mixed-endian computer system that provides cross-endian data sharing 失效
标题翻译：混合端计算机系统提供跨端数据共享
公开(公告)号：US06341345B1
公开(公告)日：2002-01-22
申请号：US08475669
申请日：1995-06-07
申请人： Marc Alan Auslander , Larry Wayne Loen
发明人： Marc Alan Auslander , Larry Wayne Loen
IPC分类号： G06F1202
CPC分类号： G06F9/34 , G06F9/3824 , G06F12/0802 , G06F13/4013
摘要： A conventional bi-endian computer system is enhanced to include mixed-endian mechanisms that allows the computer system to dynamically change its endian mode. The mixed-endian computer system can change endian mode on a task by task basis if necessary. The mixed-endian mechanisms automatically format the data in the form expected by the running task, regardless of whether the task expects the data to be in big endian format or in little endian format. The mixed-endian mechanisms also format big and little endian instructions such that they can execute on the same computer system. The mixed-endian mechanisms also include two memory management mechanisms, a single aliased memory management mechanism and a double aliased memory management mechanism. Each memory management mechanism provides cross-endian data sharing.
摘要翻译：传统的双端计算机系统被增强以包括允许计算机系统动态地改变其端模式的混合端机制。如果需要，混合端计算机系统可以根据任务改变任务的端序模式。混合端机制自动以运行任务所期望的形式格式化数据，而不管任务是期望数据是大端格式还是小端格式。混合端机制还可以制作大而小的端序指令，使其可以在同一台计算机系统上执行。混合端机制还包括两个内存管理机制，一个别名的内存管理机制和一个双别名的内存管理机制。每个内存管理机制提供跨端数据共享。

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