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1. 发明授权

US08704836B1 Distributing primitives to multiple rasterizers 有权
标题翻译：将原语分发到多个光栅化器
公开(公告)号：US08704836B1
公开(公告)日：2014-04-22
申请号：US12581700
申请日：2009-10-19
申请人： Johnny S. Rhoades , Steven E. Molnar , Emmett M. Kilgariff , Michael C. Shebanow , Ziyad S. Hakura , Dale L. Kirkland , James Daniel Kelly
发明人： Johnny S. Rhoades , Steven E. Molnar , Emmett M. Kilgariff , Michael C. Shebanow , Ziyad S. Hakura , Dale L. Kirkland , James Daniel Kelly
IPC分类号： G06F15/16
CPC分类号： G06T15/005 , G06T11/40 , G06T2210/12 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for parallel distribution of primitives to multiple rasterizers. Multiple, independent geometry units perform geometry processing concurrently on different graphics primitives. A primitive distribution scheme delivers primitives from the multiple geometry units concurrently to multiple rasterizers at rates of multiple primitives per clock. The multiple, independent rasterizer units perform rasterization concurrently on one or more graphics primitives, enabling the rendering of multiple primitives per system clock.
摘要翻译：本发明的一个实施例提出了一种用于将原语并行分配到多个光栅化器的技术。多个独立的几何单元在不同的图形基元上同时执行几何处理。原始分配方案以每个时钟的多个基元的速率将原始图元从多个几何单元同时传送到多个光栅化器。多个独立的光栅化器单元在一个或多个图形基元上同时执行光栅化，使得能够每个系统时钟渲染多个基元。

2. 发明授权

US09536341B1 Distributing primitives to multiple rasterizers 有权
标题翻译：将原语分发到多个光栅化器
公开(公告)号：US09536341B1
公开(公告)日：2017-01-03
申请号：US12581746
申请日：2009-10-19
申请人： Johnny S. Rhoades , Emmett M. Kilgariff , Michael C. Shebanow , Ziyad S. Hakura , Dale L. Kirkland , James Daniel Kelly
发明人： Johnny S. Rhoades , Emmett M. Kilgariff , Michael C. Shebanow , Ziyad S. Hakura , Dale L. Kirkland , James Daniel Kelly
IPC分类号： G06F15/80 , G06T15/00
CPC分类号： G06T15/005 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for parallel distribution of primitives to multiple rasterizers. Multiple, independent geometry units perform geometry processing concurrently on different graphics primitives. A primitive distribution scheme delivers primitives from the multiple geometry units concurrently to multiple rasterizers at rates of multiple primitives per clock. The multiple, independent rasterizer units perform rasterization concurrently on one or more graphics primitives, enabling the rendering of multiple primitives per system clock.
摘要翻译：本发明的一个实施例提出了一种用于将原语并行分配到多个光栅化器的技术。多个独立的几何单元在不同的图形基元上同时执行几何处理。原始分配方案以每个时钟的多个基元的速率将原始图元从多个几何单元同时传送到多个光栅化器。多个独立的光栅化器单元在一个或多个图形基元上同时执行光栅化，使得能够每个系统时钟渲染多个基元。

3. 发明申请

US20130038620A1 TIME SLICE PROCESSING OF TESSELLATION AND GEOMETRY SHADERS 有权
标题翻译：测量和几何学家的时间片加工
公开(公告)号：US20130038620A1
公开(公告)日：2013-02-14
申请号：US13208256
申请日：2011-08-11
申请人： Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Johnny S. Rhoades , Cynthia Ann Edgeworth Allison , Karim M. Abdalla
发明人： Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Johnny S. Rhoades , Cynthia Ann Edgeworth Allison , Karim M. Abdalla
IPC分类号： G09G5/00 , G06T1/00
CPC分类号： G06T1/20
摘要： One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for processing by multiple graphics pipelines. Geometric primitives that are generated in a first processing cycle are collected and redistributed more evenly and in smaller tasks to the multiple graphics pipelines for vertex processing in a second processing cycle. The smaller tasks do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second cycle are balanced and make full use of resources. Therefore, the performance of the tessellation and geometry shaders is improved.
摘要翻译：本发明的一个实施例提出了一种用于重新分配由镶嵌和几何着色器生成的几何图元以用于由多个图形管线进行处理的技术。在第一个处理周期中生成的几何图元在第二个处理周期中被收集并且更均匀地并且在更小的任务中重新分布到用于顶点处理的多个图形流水线。较小的任务不超过图形管道的资源限制，并且第二周期中的图形管道的每顶点处理工作负载平衡并充分利用资源。因此，纹理和几何着色器的性能得到改善。

4. 发明授权

US08947444B1 Distributed vertex attribute fetch 有权
标题翻译：分布式顶点属性获取
公开(公告)号：US08947444B1
公开(公告)日：2015-02-03
申请号：US12331307
申请日：2008-12-09
申请人： Ziyad S. Hakura , Emmett M. Kilgariff , Michael C. Shebanow , James C. Bowman , Philip Browning Johnson , Johnny S. Rhoades , Rohit Gupta
发明人： Ziyad S. Hakura , Emmett M. Kilgariff , Michael C. Shebanow , James C. Bowman , Philip Browning Johnson , Johnny S. Rhoades , Rohit Gupta
IPC分类号： G06T1/00
CPC分类号： G06T1/20
摘要： A data structure that includes pointers to vertex attributes and primitive descriptions is generated and then processed within a general processing cluster. The general processing cluster includes a vertex attribute fetch unit that fetches from memory vertex attributes corresponding to the vertices defined by the primitive descriptions.
摘要翻译：生成包含指向顶点属性和原始描述的指针的数据结构，然后在通用处理集群中进行处理。一般处理集群包括从与由原始描述定义的顶点相对应的存储器顶点属性中获取的顶点属性提取单元。

5. 发明授权

US09436969B2 Time slice processing of tessellation and geometry shaders 有权
标题翻译：镶嵌和几何着色器的时间片处理
公开(公告)号：US09436969B2
公开(公告)日：2016-09-06
申请号：US13208256
申请日：2011-08-11
申请人： Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Johnny S. Rhoades , Cynthia Ann Edgeworth Allison , Karim M. Abdalla
发明人： Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Johnny S. Rhoades , Cynthia Ann Edgeworth Allison , Karim M. Abdalla
IPC分类号： G06T1/20
CPC分类号： G06T1/20
摘要： One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for processing by multiple graphics pipelines. Geometric primitives that are generated in a first processing cycle are collected and redistributed more evenly and in smaller tasks to the multiple graphics pipelines for vertex processing in a second processing cycle. The smaller tasks do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second cycle are balanced and make full use of resources. Therefore, the performance of the tessellation and geometry shaders is improved.
摘要翻译：本发明的一个实施例提出了一种用于重新分配由镶嵌和几何着色器生成的几何图元以用于由多个图形管线进行处理的技术。在第一个处理周期中生成的几何图元在第二个处理周期中被收集并且更均匀地并且在更小的任务中重新分布到用于顶点处理的多个图形流水线。较小的任务不超过图形管道的资源限制，并且第二周期中的图形管道的每顶点处理工作负载平衡并充分利用资源。因此，纹理和几何着色器的性能得到改善。

6. 发明授权

US08917271B2 Redistribution of generated geometric primitives 有权
标题翻译：生成的几何图元的再分配
公开(公告)号：US08917271B2
公开(公告)日：2014-12-23
申请号：US12897578
申请日：2010-10-04
申请人： Johnny S. Rhoades , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
发明人： Johnny S. Rhoades , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
IPC分类号： G06T15/50 , G06T17/20 , G06T15/00
CPC分类号： G06T15/005 , G06T17/20 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for per-vertex by multiple graphics pipelines. Geometric primitives that are generated in a first processing stage are collected and redistributed more evenly and in smaller batches to the multiple graphics pipelines for vertex processing in a second processing stage. The smaller batches do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second stage are balanced. Therefore, the performance of the tessellation and geometry shaders is improved.
摘要翻译：本发明的一个实施例提出了一种用于通过多个图形管线重新分配由每个顶点由镶嵌和几何着色器生成的几何图元的技术。在第一处理阶段中生成的几何图元在第二处理阶段被收集并且更均匀地并且以较小批次重新分布到多个图形流水线进行顶点处理。较小的批次不超过图形管道的资源限制，并且第二阶段中图形管道的每顶点处理工作负载平衡。因此，纹理和几何着色器的性能得到改善。

7. 发明申请

US20110080404A1 Redistribution Of Generated Geometric Primitives 有权
标题翻译：生成的几何基元的再分配
公开(公告)号：US20110080404A1
公开(公告)日：2011-04-07
申请号：US12897578
申请日：2010-10-04
申请人： Johnny S. RHOADES , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
发明人： Johnny S. RHOADES , Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Cynthia Ann Edgeworth Allison , Karl M. Wurstner , Karim M. Abdalla
IPC分类号： G06T17/20
CPC分类号： G06T15/005 , G06T17/20 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for per-vertex by multiple graphics pipelines. Geometric primitives that are generated in a first processing stage are collected and redistributed more evenly and in smaller batches to the multiple graphics pipelines for vertex processing in a second processing stage. The smaller batches do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second stage are balanced. Therefore, the performance of the tessellation and geometry shaders is improved.
摘要翻译：本发明的一个实施例提出了一种用于通过多个图形管线重新分配由每个顶点由镶嵌和几何着色器生成的几何图元的技术。在第一处理阶段中生成的几何图元在第二处理阶段被收集并且更均匀地并且以较小批次重新分布到多个图形流水线进行顶点处理。较小的批次不超过图形管道的资源限制，并且第二阶段中图形管道的每顶点处理工作负载平衡。因此，纹理和几何着色器的性能得到改善。

8. 发明申请

US20110090220A1 ORDER-PRESERVING DISTRIBUTED RASTERIZER 有权
标题翻译：订购保存分配的RASTERIZER
公开(公告)号：US20110090220A1
公开(公告)日：2011-04-21
申请号：US12580017
申请日：2009-10-15
申请人： Steven E. Molnar , Emmett M. Kilgariff , Johnny S. Rhoades , Timothy John Purcell , Sean J. Treichler , Ziyad S. Hakura , Franklin C. Crow , James C. Bowman
发明人： Steven E. Molnar , Emmett M. Kilgariff , Johnny S. Rhoades , Timothy John Purcell , Sean J. Treichler , Ziyad S. Hakura , Franklin C. Crow , James C. Bowman
IPC分类号： G06F15/80 , G06T15/00
CPC分类号： G06T15/005 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for rendering graphics primitives in parallel while maintaining the API primitive ordering. Multiple, independent geometry units perform geometry processing concurrently on different graphics primitives. A primitive distribution scheme delivers primitives concurrently to multiple rasterizers at rates of multiple primitives per clock while maintaining the primitive ordering for each pixel. The multiple, independent rasterizer units perform rasterization concurrently on one or more graphics primitives, enabling the rendering of multiple primitives per system clock.
摘要翻译：本发明的一个实施例提出了一种用于在保持API原语排序的同时并行渲染图形基元的技术。多个独立的几何单元在不同的图形基元上同时执行几何处理。原始分配方案以每个时钟的多个基元的速率同时向多个光栅化器提供原语，同时保持每个像素的原始排序。多个独立的光栅化器单元在一个或多个图形基元上同时执行光栅化，使得能够每个系统时钟渲染多个基元。

9. 发明授权

US08587581B2 Order-preserving distributed rasterizer 有权
公开(公告)号：US08587581B2
公开(公告)日：2013-11-19
申请号：US12580017
申请日：2009-10-15
申请人： Steven E. Molnar , Emmett M. Kilgariff , Johnny S. Rhoades , Timothy John Purcell , Sean J. Treichler , Ziyad S. Hakura , Franklin C. Crow , James C. Bowman
发明人： Steven E. Molnar , Emmett M. Kilgariff , Johnny S. Rhoades , Timothy John Purcell , Sean J. Treichler , Ziyad S. Hakura , Franklin C. Crow , James C. Bowman
IPC分类号： G06T17/00
CPC分类号： G06T15/005 , G06T2210/52
摘要： One embodiment of the present invention sets forth a technique for rendering graphics primitives in parallel while maintaining the API primitive ordering. Multiple, independent geometry units perform geometry processing concurrently on different graphics primitives. A primitive distribution scheme delivers primitives concurrently to multiple rasterizers at rates of multiple primitives per clock while maintaining the primitive ordering for each pixel. The multiple, independent rasterizer units perform rasterization concurrently on one or more graphics primitives, enabling the rendering of multiple primitives per system clock.

10. 发明授权

US08817031B2 Distributed stream output in a parallel processing unit 有权
标题翻译：分布式流输出并行处理单元
公开(公告)号：US08817031B2
公开(公告)日：2014-08-26
申请号：US12894001
申请日：2010-09-29
申请人： Ziyad S. Hakura , Rohit Gupta , Michael C. Shebanow , Emmett M. Kilgariff
发明人： Ziyad S. Hakura , Rohit Gupta , Michael C. Shebanow , Emmett M. Kilgariff
IPC分类号： G06F15/80
CPC分类号： G06T1/00
摘要： A technique for performing stream output operations in a parallel processing system is disclosed. A stream synchronization unit is provided that enables the parallel processing unit to track batches of vertices being processed in a graphics processing pipeline. A plurality of stream output units is also provided, where each stream output unit writes vertex attribute data to one or more stream output buffers for a portion of the batches of vertices. A messaging protocol is implemented between the stream synchronization unit and the plurality of stream output units that ensures that each of the stream output units writes vertex attribute data for the particular batch of vertices distributed to that particular stream output unit in the same order in the stream output buffers as the order in which the batch of vertices was received from a device driver by the parallel processing unit.
摘要翻译：公开了一种用于在并行处理系统中执行流输出操作的技术。提供流同步单元，其使并行处理单元能够跟踪在图形处理流水线中正在处理的顶点的批次。还提供了多个流输出单元，其中每个流输出单元将顶点属性数据写入一批或多个顶点的一部分的流输出缓冲器。在流同步单元和多个流输出单元之间实现消息传递协议，确保每个流输出单元以流中相同的顺序写入分配给该特定流输出单元的特定批次的顶点的顶点属性数据输出缓冲器作为由并行处理单元从设备驱动器接收到顶点批次的顺序。

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